Research:Papers

- Duarte Galvão, Rui Policarpo Duarte, Horácio Neto; "-Source Framework for Implementation of ECSS-E-ST-50-15C Compliant CAN Bus for Space Systems"; Small Satellites Systems and Services Symposium, Vilamoura, Portugal, 2-6 Mar 2021, (Accepted for oral presentation)

- Helena Cruz, Rui Policarpo Duarte, Horácio Neto; "Embedded Fault-Tolerant Architecture for On-board Synthetic-Aperture Radar Backprojection"; Small Satellites Systems and Services Symposium, Vilamoura, Portugal, 2-6 Mar 2021, (Accepted for oral presentation)

- M. P. Véstias, R. P. Duarte, J. T. De Sousa, H. C. Neto, "A Configurable Architecture for Running Hybrid Convolutional Neural Networks in Low-Density FPGAs", IEEE Access 8, 107229-107243 pdf

- M. P. Véstias, R. P. Duarte, J. T. De Sousa, H. C. Neto, "A Fast and Scalable Architecture to Run Convolutional Neural Networks in Low Density FPGAs", Microprocessors and Microsystems, 103136 pdf

- M. P. Véstias, R. P. Duarte, J. T. De Sousa, H. C. Neto, "Moving Deep Learning to the Edge", Algorithms (MDPI), 13 (5), 125 pdf

- Rui Policarpo Duarte, Helena Cruz and Horácio Neto; "Reconfigurable Accelerator for On-Board SAR Imaging Using Backprojection"; Proceedings 16th Applied Reconfigurable Computing (ARC 2020) pdf

- J. Vieira, R. P. Duarte and H. C. Neto, "kNN-STUFF: kNN STreaming Unit for Fpgas," in IEEE Access, vol. 7, pp. 170864-170877, 2019, doi: 10.1109/ACCESS.2019.2955864 pdf

- Mário P. Véstias, Rui Policarpo Duarte, José T. de Sousa and Horácio C. Neto , "Fast Convolutional Neural Networks in Low Density FPGAs Using Zero-Skipping and Weight Pruning," in Electronics, 2019 pdf

- Helena Cruz, Rui Policarpo Duarte, Horacio Neto,"Embedded Fault-Tolerant Accelerator Architecture for Synthetic-Aperture Radar Backprojection,", 2019, Journal of Aerospace Information Systems, pp. 512-520, vol. 16, p. 11, doi: 10.2514/1.I010764 pdf

- Helena Cruz, Rui Policarpo Duarte and Horácio Neto; "Fault-Tolerant Architecture for On-board Dual-Core Synthetic-Aperture Radar Imaging"; Proceedings 15th Applied Reconfigurable Computing (ARC 2019) pdf

- João C. Casaleiro, Carlos F. Carvalho, Pedro Viçoso Fazenda, Rui Policarpo Duarte; "On the Feasibility of GPON Fiber Light Energy Harvesting for the Internet of Things"; ISEL Academic Journal of Electronics, Telecommunications and Computers (i-ETC), Vol 4, No 1, 2018 pdf

- Rui Policarpo Duarte, Mário Véstias, Carlos Carvalho, João Casaleiro; "Stochastic Theater: Stochastic Datapath Generation Framework for Fault-Tolerant IoT Sensors"; ISEL Academic Journal of Electronics, Telecommunications and Computers (i-ETC), Vol 4, No 1, 2018 pdf

- Luís Fiolhais, Fernando Gonçalves, Rui P Duarte, Mário Véstias, Jose T de Sousa; "Low Energy Heterogeneous Computing with Multiple RISC-V and CGRA Cores"; Proceedings 2019 IEEE International Symposium on Circuits and Systems (ISCAS 2019); IEEE, Sapporo, Japan, 26-29 May 2019; pdf

- Mário P Véstias, Rui Policarpo Duarte, José T de Sousa, Horácio Neto; "Hybrid Dot-Product Calculation for Convolutional Neural Networks in FPGA"; Proceedings of the 29th International Conference on Field Programmable Logic and Applications (FPL 2019); IEEE, Barcelona, Spain, 9-13 September 2019; pdf

- José M. P. Nascimento, Mário Véstias, Rui Duarte; "Hyperspectral compressive sensing: a low-power consumption approach"; Proceedings Volume 10792, High-Performance Computing in Geoscience and Remote Sensing VIII;, SPIE Remote Sensing, Berlin, Germany; pdf

- Rui Policarpo Duarte, Horácio Neto; "Stochastic processors on FPGAs to compute sensor data towards fault-tolerant IoT systems"; 2018 IEEE Conference on Dependable and Secure Computing (DSC 2018), Taiwan; pdf

- Rui Policarpo Duarte, Álvaro Simões, Rui Henriques, Horácio Neto; "FPGA-based OpenCL Accelerator for Discovering Temporal Patterns in Gene Expression Data Using Biclustering"; PBio 2018 - 6th International Workshop on Parallelism in Bioinformatics, EuroMPI 2018 - The EuroMPI 2018 Conference; Barcelona, Spain; pdf

- Mário Véstias, Rui Policarpo Duarte, Jose T. de Sousa, Horácio Neto; "Lite-CNN: A High-Performance Architecture to Run CNNs in Low Density FPGAs"; FPL 2018 - 28th International Conference on Field Programmable Logic and Applications; Dublin, Ireland; pdf

- João Oliveira, João Soares, André Lourenco, Rui Policarpo Duarte; "Intelligent Sensors for Real-Time Hazard Detection and Visual Indication on Highways"; (i-ETC) ISEL Academic Journal of Electronics, Telecommunications and Computers, Vol 3, No 1, 2017 pdf

- Mário Véstias, Rui Policarpo Duarte, Horácio Neto, José de Sousa; "Parallel Dot-Products for Deep Learning on FPGA"; FPL 2017 - 27th International Conference on Field Programmable Logic and Applications - RFPL, Ghent, Belgium pdf

- Rui Policarpo Duarte, Mário Véstias, Horácio Neto; "On the Computation of Approximation Coefficients in ROM-Based Redundancy for SEU Mitigation on FPGAs"; RFPL, 1st Reliable Field Programmable Logic Workshop, FPL 2017 - 27th International Conference on Field Programmable Logic and Applications, Ghent, Belgium; pdf

- Mário Véstias, Rui Policarpo Duarte; "Top-down Learning of Embedded Systems Design on FPGA;" REC 2017 - XIII Workshop on Reconfigurable Systems; Aveiro, PT; pdf

- Rui Policarpo Duarte, Mário Véstias, Horácio Neto, "XtokaxtikoX: A Stochastic Computing-Based Autonomous Cyber-Physical System", ICRC2016 - 1st IEEE International Conference on Rebooting Computing, San Diego, USA; pdf

- Rui Policarpo Duarte, Christos-Savvas Bouganis; "Variation-Aware Optimisation for Reconfigurable Cyber-Physical Systems"; Technological Innovation for Cyber-Physical Systems, Volume 470 of the series IFIP Advances in Information and Communication Technology pp 237-252, March 2016; pdf

- Michail Vavouras, Rui Policarpo Duarte, Antonino Armato, Christos Bouganis, "A Hybrid ASIC/FPGA Fault-Tolerant Artificial Pancreas", International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation; Samos 2016, GR;pdf

- André Lourenço, Ana Priscila Alves, Carlos Carreiras, Rui Policarpo Duarte and Ana Fred, "CardioWheel: ECG biometrics on the steering wheel", ECML PKDD 2015 - European Conference on Machine Learning and Principles and Practice of Knowledge Discovery in Databases; pdf

- Rui Policarpo Duarte, Mário Véstias, Horácio Neto, "Designing Hardware/Software Systems for Embedded High-Performance Computing", FSP2015 - 2nd International Workshop on FPGAs for Software Programmers (FSP 2015), FPL 2015 - 25th International Conference on Field Programmable Logic and Applications, London, UK; pdf

- Rui Policarpo Duarte, Mário Véstias, Horácio Neto, "Enhancing Stochastic Computations via Process Variation", FPL2015 - International Conference on Field Programmable Logic and Applications, London, UK; pdf

- Rui Policarpo Duarte, Jorge Lobo, João Filipe, Jorge Dias, "Synthesis of Bayesian Machines On FPGAs Using Stochastic Arithmetic"; 2nd International Workshop on Neuromorphic and Brain-Based Computing Systems (NeuComp, DATE 2015), FR; pdf

- Rui Policarpo Duarte, Christos-Savvas Bouganis; "OverClocking KLT Designs on FPGAs Under Process, Voltage and Temperature Variation"; ACM TRETS from ARC 2014; pdf

- Rui Policarpo Duarte, Christos-Savvas Bouganis; "Zero-Latency Datapath Error Correction Framework for Over-Clocking DSP Applications on FPGAs"; ReConfig 2014 - International Conference on Reconfigurable Computing and FPGAs, Cancun, MX; pdf

- Rui Policarpo Duarte, Christos-Savvas Bouganis; "Over-Clocking of Linear Projection Designs Through Device Specific Optimisations"; RAW 2014 - Reconfigurable Architectures Workshop, Phoenix, USA; pdf

- Rui Policarpo Duarte, Christos-Savvas Bouganis; "A Unified Framework for Over-Clocking Linear Projections on FPGAs Under PVT Variation"; ARC 2014 - International Symposium on Applied Reconfigurable Computing, Vilamoura, PT; pdf

- Rui Policarpo Duarte, Christos-Savvas Bouganis; "Pushing the Performance Boundary Through Device Specific Optimisations" (abstract); FPGA 2014 - International Symposium on Field-Programable Gate Arrays, Monterey, USA; pdf

- Rui Policarpo Duarte, Christos-Savvas Bouganis; "High-Level Linear Projection Circuit Design Optimization Framework For Fpgas Under Over-Clocking"; FPL 2012 - 22nd International Conference on Field Programmable Logic and Applications, Oslo, NO; pdf

- Rui Duarte, Vitor Silva, Mário Véstias, Horácio Neto; "Multiplier-Based Double Precision Floating-Point Divider According to the IEEE-754 Standard"; ARC 2008 - International Workshop on Applied Reconfigurable Computing; Imperial College London, UK; pdf

- Rui Duarte, Mário Véstias, Horácio Neto; "Double Precision Floating-Point Multiplier using Coarse-Grain Units"; REC 2009 - V Workshop on Reconfigurable Systems; Monte de Caparica, PT; pdf

- Rui Duarte, Mário Véstias, Horácio Neto; "Double-precision Gauss-Jordan Algorithm with Partial Pivoting on FPGAs"; DSD 2009 - 12th Euromicro Conference on Digital System Design / Architectures, Methods and Tools; Patras, GR; pdf

- Rui Duarte, Vitor Silva, Mário Véstias, Horácio Neto; "Double Precision Floating-Point Divider Using Iterative Multiplications"; REC 2008 - IV Workshop on Reconfigurable Systems; Braga, PT; pdf

- Rui Duarte; "Transport Alternatives for Large Delay-Bandwidth Product Networks;" JETC'08 - IV Workshop on Electronics, Telecommunications and Computers Engineering; ISEL, Lisboa, PT. pdf


Patents:

- "Modular signalling system to detect vehicles on a highway". Registration date: 12/2006. Approval date: 05/2007. Portuguese patent number: 103620.

- "Safe, search, and emergency status indicator for rescue teams". Registration date: 8/2016. Patent Pending.

- "Modular system for communication of very short messages on communication networks using the network's signaling mechanism". Registration date: 9/2016. Patent Pending.

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