by Biao Wang, Diego F. de Souza, Mauricio Alvarez Mesa, Chi Ching Chi, Ben H. H. Juurlink, Aleksandar Ilic, Nuno Roma and Leonel Sousa
Reference:
B. Wang, D. F. d. Souza, M. A. Mesa, C. C. Chi, B. H. H. Juurlink, A. Ilic, N. Roma, L. Sousa, "GPU Parallelization of HEVC In-Loop Filters", International Journal of Parallel Programming, vol. 45, no. 6, dec 2017, pp. 1515–1535.
Bibtex Entry:
@Article{ijpp16,
author = {Biao Wang and Diego F. de Souza and Mauricio Alvarez Mesa and Chi Ching Chi and Ben H. H. Juurlink and Aleksandar Ilic and Nuno Roma and Leonel Sousa},
journal = {International Journal of Parallel Programming},
month = {dec},
title = {{GPU} Parallelization of {HEVC} In-Loop Filters},
doi = {10.1007/s10766-017-0488-z},
number = {6},
pages = {1515--1535},
url = {nfvr_pubs/ijpp16.pdf},
volume = {45},
bibsource = {dblp computer science bibliography, https://dblp.org},
biburl = {https://dblp.org/rec/journals/ijpp/WangSMCJIRS17.bib},
keywords = {read},
readstatus = {read},
timestamp = {Wed, 01 Apr 2020 01:00:00 +0200},
year = {2017},
}