Second Digital Systems VHDL Project

A couple of days ago, I published something talking about my first VHDL project in the Digital Systems’s lab class. Well, yesterday, we experienced again with the vivado software.

As expected it was a more demanding task, being substantially more difficult to achieve the project’s objectives.

It was quite difficult to overcome some issues regarding the problem, but in the end, I think we did ok.

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Nevertheless the difficulties regarding the project, I think it was, once again, a very rich and          interesting class where we were able to develop our skills with vivado. This skills that we will need in the next and final project in the subject “Digital Systems”.