{"id":172,"date":"2020-09-02T11:34:31","date_gmt":"2020-09-02T10:34:31","guid":{"rendered":"http:\/\/web.tecnico.ulisboa.pt\/~ist14359\/wordpress\/?page_id=172"},"modified":"2025-08-20T12:42:39","modified_gmt":"2025-08-20T11:42:39","slug":"publications","status":"publish","type":"page","link":"https:\/\/web.tecnico.ulisboa.pt\/~ist14359\/wordpress\/?page_id=172","title":{"rendered":"Publications"},"content":{"rendered":"<p>The list below is a local compilation of my publication repository. Other external compilations can be found in:<\/p>\n<ul>\n<li><a href=\"https:\/\/www.inesc-id.pt\/member\/ef9904c1-9050-48bd-869f-af173d6e8cdf\/publications\/\" target=\"_blank\" rel=\"noopener noreferrer\">INESC-ID <\/a>webpage (structured and most updated list)<\/li>\n<li><a href=\"https:\/\/scholar.google.com\/citations?user=iDxEJwIAAAAJ\" target=\"_blank\" rel=\"noopener noreferrer\">Google Scholar<\/a> profile<\/li>\n<li><a href=\"https:\/\/dblp.uni-trier.de\/pid\/35\/8006.html\" target=\"_blank\" rel=\"noopener noreferrer\">DBLP<\/a> profile<\/li>\n<li><a href=\"https:\/\/orcid.org\/0000-0003-2491-4977\" target=\"_blank\" rel=\"noopener noreferrer\">ORCID<\/a> profile<\/li>\n<li><a href=\"https:\/\/publons.com\/researcher\/3376760\/nuno-roma\/\" target=\"_blank\" rel=\"noopener noreferrer\">ResearcherID<\/a> profile<\/li>\n<\/ul>\n<p>Types of publications:<\/p>\n<ul>\n<li><a href=\"#Books\">Editorials<\/a><\/li>\n<li><a href=\"#BookChap\">Book Chapters<\/a><\/li>\n<li><a href=\"#IntJourn\">International Journal articles<\/a><\/li>\n<li><a href=\"#IntConf\">International Conference papers<\/a><\/li>\n<li><a href=\"#Theses\">Theses<\/a><\/li>\n<\/ul>\n\n\n<div class=\"sheader\"><a id=\"Books\"><\/a>Editorials<\/div>\n<table class=\"result\">\n<tr><td colspan=\"2\" class=\"theader\">2023<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"5\"><\/a>[5]<\/td><td class=\"bibitem\">N. Roma, B. Zatt, <em><a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/sbcci22SI.pdf\"><span class=\"bibtitle\">Special Issue on \"SBCCI'2022\"<\/span><\/a><\/em>, IEEE Design & Test, IEEE, vol. 5, no. 5, pp. 5-6, 2023.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.btitle=Special+Issue+on+%22SBCCI%272022%22&amp;rft.genre=book&amp;rft.pub=IEEE+Design+%26+Test%2C+IEEE%2C+vol.+5%2C+no.+5%2C+pp.+5-6&amp;rft_id=nfvr_pubs%2Fsbcci22SI.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2023&amp;rft.au=Nuno+Roma&amp;rft.au=Bruno+Zatt\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"sbcci22SI\" href=\"bibtexbrowser.php?key=sbcci22SI&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/sbcci22SI.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/MDAT.2023.3291688\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2022<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"4\"><\/a>[4]<\/td><td class=\"bibitem\">L. Agostini, N. Roma, <em><a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/sbcci22_proc.pdf\"><span class=\"bibtitle\">SBCCI 2022: Proceedings of the 35th SBC\/SBMicro\/IEEE\/ACM Symposium on Integrated Circuits and Systems Design<\/span><\/a><\/em>, IEEE, 2022.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.btitle=SBCCI+2022%3A+Proceedings+of+the+35th+SBC%2FSBMicro%2FIEEE%2FACM+Symposium+on+Integrated+Circuits+and+Systems+Design&amp;rft.genre=book&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Fsbcci22_proc.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2022&amp;rft.au=Luciano+Agostini&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"sbcci22_proc\" href=\"bibtexbrowser.php?key=sbcci22_proc&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/sbcci22_proc.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/SBCCI55532.2022\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2021<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"3\"><\/a>[3]<\/td><td class=\"bibitem\">L. Sousa, N. Roma and P. Tom\u00e1s, <em><a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/europar21_proc.pdf\"><span class=\"bibtitle\">Euro-Par 2021: Proceedings of the 27th International Conference on Parallel and Distributed Computing<\/span><\/a><\/em>, Lecture Notes in Computer Science (LNCS), Springer, no. 12820, 2021.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.btitle=Euro-Par+2021%3A+Proceedings+of+the+27th+International+Conference+on+Parallel+and+Distributed+Computing&amp;rft.genre=book&amp;rft.pub=Lecture+Notes+in+Computer+Science+%28LNCS%29%2C+Springer%2C+no.+12820&amp;rft_id=nfvr_pubs%2Feuropar21_proc.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2021&amp;rft.au=Leonel+Sousa&amp;rft.au=Nuno+Roma&amp;rft.au=Pedro+Tom%C3%A1s\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"europar21_proc\" href=\"bibtexbrowser.php?key=europar21_proc&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/europar21_proc.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1007\/978-3-030-85665-6\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2017<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"2\"><\/a>[2]<\/td><td class=\"bibitem\">L. Sousa, N. Roma, <em><a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/JRTIP15_editorial.pdf\"><span class=\"bibtitle\">Special Issue on Real-Time Energy-Aware Circuits and Systems for HEVC and for its 3D and SVC Extensions<\/span><\/a><\/em>, Journal of Real-Time Image Processing, Springer, vol. 1, no. 1, pp. 1-3, 2017.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.btitle=Special+Issue+on+Real-Time+Energy-Aware+Circuits+and+Systems+for+HEVC+and+for+its+3D+and+SVC+Extensions&amp;rft.genre=book&amp;rft.pub=Journal+of+Real-Time+Image+Processing%2C+Springer%2C+vol.+1%2C+no.+1%2C+pp.+1-3&amp;rft_id=nfvr_pubs%2FJRTIP15_editorial.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2017&amp;rft.au=Leonel+Sousa&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"JRTIP15_editorial\" href=\"bibtexbrowser.php?key=JRTIP15_editorial&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/JRTIP15_editorial.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1007\/s11554-017-0675-6\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2016<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"1\"><\/a>[1]<\/td><td class=\"bibitem\">N. Roma, J. Nunez-Yanez, <em><a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/JES15_editorial.pdf\"><span class=\"bibtitle\">Special Issue on Energy Efficient Architectures for Embedded Systems<\/span><\/a><\/em>, EURASIP Journal on Embedded Systems, Springer, vol. 20, pp. 1-2, 2016.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.btitle=Special+Issue+on+Energy+Efficient+Architectures+for+Embedded+Systems&amp;rft.genre=book&amp;rft.pub=EURASIP+Journal+on+Embedded+Systems%2C+Springer%2C+vol.+20%2C+pp.+1-2&amp;rft_id=nfvr_pubs%2FJES15_editorial.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2016&amp;rft.au=Nuno+Roma&amp;rft.au=Jose+Nunez-Yanez\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"JES15_editorial\" href=\"bibtexbrowser.php?key=JES15_editorial&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/JES15_editorial.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1186\/s13639-016-0054-6\">[doi]<\/a><\/span><\/td><\/tr>\n<\/table>\n<div class=\"sheader\"><a id=\"BookChap\"><\/a>Book Chapters<\/div>\n<table class=\"result\">\n<tr><td colspan=\"2\" class=\"theader\">2017<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"4\"><\/a>[4]<\/td><td class=\"bibitem\">N. Roma, A. Rodrigues and L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/pmmcs11.pdf\"><span class=\"bibtitle\">Parallel Programming Framework for H.264\/AVC Video Encoding in Multicore Systems<\/span><\/a>&quot;, in <em>Programming multi\u2010core and many\u2010core computing systems<\/em>, S. Pllana, F. Xhafa, Eds., John Wiley & Sons, Ltd, 2017, pp. 281-300.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.btitle=Programming+multi%E2%80%90core+and+many%E2%80%90core+computing+systems&amp;rft.atitle=Parallel+Programming+Framework+for+H.264%2FAVC+Video+Encoding+in+Multicore+Systems&amp;rft.genre=bookitem&amp;rft.pub=John+Wiley+%26+Sons%2C+Ltd&amp;rft_id=nfvr_pubs%2Fpmmcs11.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2017&amp;rft.au=Nuno+Roma&amp;rft.au=Ant%C3%B3nio+Rodrigues&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"pmmcs11\" href=\"bibtexbrowser.php?key=pmmcs11&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/pmmcs11.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1002\/9781119332015.ch14\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2004<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"3\"><\/a>[3]<\/td><td class=\"bibitem\">N. Roma, T. Dias and L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/naaarc04.pdf\"><span class=\"bibtitle\">Customisable Core-Based Architectures for Real-Time Motion Estimation on FPGAs<\/span><\/a>&quot;, in <em>New Algorithms, Architectures, and Applications for Reconfigurable Computing<\/em>, P. Y. K. Cheung, G. A. Constantinides, J. T. d. Sousa, Eds., Springer-Verlag, 2004, pp. 55\u201366.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.btitle=New+Algorithms%2C+Architectures%2C+and+Applications+for+Reconfigurable+Computing&amp;rft.atitle=Customisable+Core-Based+Architectures+for+Real-Time+Motion+Estimation+on+FPGAs&amp;rft.genre=bookitem&amp;rft.pub=Springer-Verlag&amp;rft_id=nfvr_pubs%2Fnaaarc04.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2004&amp;rft.au=Nuno+Roma&amp;rft.au=Tiago+Dias&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"naaarc04\" href=\"bibtexbrowser.php?key=naaarc04&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/naaarc04.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1007\/978-3-540-45234-8_72\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2002<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"2\"><\/a>[2]<\/td><td class=\"bibitem\">N. Roma, L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/socdm02.pdf\"><span class=\"bibtitle\">A New Efficient VLSI Architecture for Full Search Block Matching Motion Estimation<\/span><\/a>&quot;, in <em>SOC Design Methodologies<\/em>, M. Robert et al., Eds., Kluwer Academic Pulishers, 2002, pp. 253-264.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.btitle=SOC+Design+Methodologies&amp;rft.atitle=A+New+Efficient+VLSI+Architecture+for+Full+Search+Block+Matching+Motion+Estimation&amp;rft.genre=bookitem&amp;rft.pub=Kluwer+Academic+Pulishers&amp;rft_id=nfvr_pubs%2Fsocdm02.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2002&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"socdm02\" href=\"bibtexbrowser.php?key=socdm02&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/socdm02.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1007\/978-0-387-35597-9_22\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"1\"><\/a>[1]<\/td><td class=\"bibitem\">N. Roma, J. Santos-Victor and J. Tom\u00e9, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/wspc02.pdf\"><span class=\"bibtitle\">A Comparative Analysis of Cross-Correlation Matching Algorithms Using a Pyramidal Resolution Approach<\/span><\/a>&quot;, in <em>Empirical Evaluation Methods in Computer Vision<\/em>, H. I. Christensen, P. J. Phillips, Eds., World Scientific Press, 2002, pp. 117\u2013142.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.btitle=Empirical+Evaluation+Methods+in+Computer+Vision&amp;rft.atitle=A+Comparative+Analysis+of+Cross-Correlation+Matching+Algorithms+Using+a+Pyramidal+Resolution+Approach&amp;rft.genre=bookitem&amp;rft.pub=World+Scientific+Press&amp;rft_id=nfvr_pubs%2Fwspc02.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2002&amp;rft.au=Nuno+Roma&amp;rft.au=Jos%C3%A9+Santos-Victor&amp;rft.au=Jos%C3%A9+Tom%C3%A9\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"wspc02\" href=\"bibtexbrowser.php?key=wspc02&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/wspc02.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1007\/978-0-387-35597-9_22\">[doi]<\/a><\/span><\/td><\/tr>\n<\/table>\n<div class=\"sheader\"><a id=\"IntJourn\"><\/a>International Journal Articles<\/div>\n<table class=\"result\">\n<tr><td colspan=\"2\" class=\"theader\">2025<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"52\"><\/a>[52]<\/td><td class=\"bibitem\">L. Crespo, N. Neves, P. Tom\u00e1s, N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/pieee25.pdf\"><span class=\"bibtitle\">A Survey on Stream-based Architectures: from accelerators to CPUs<\/span><\/a>&quot;, <em>Proceedings of the IEEE (accepted)<\/em>, dec 2025, pp. .\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=A+Survey+on+Stream-based+Architectures%3A+from+accelerators+to+CPUs&amp;rft.jtitle=Proceedings+of+the+IEEE+%28accepted%29&amp;rft.volume=&amp;rft.issue=&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Fpieee25.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2025&amp;rft.au=Lu%C3%ADs+Crespo&amp;rft.au=Nuno+Neves&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"pieee25\" href=\"bibtexbrowser.php?key=pieee25&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/pieee25.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"51\"><\/a>[51]<\/td><td class=\"bibitem\">I. Storch, N. Roma, D. Palomino, S. Bampi, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/tcasI25a.pdf\"><span class=\"bibtitle\">Improving Coding Efficiency of Massive Parallel Intra Prediction Using Alternative References<\/span><\/a>&quot;, <em>IEEE Transactions on Circuits and Systems I<\/em>, vol. 72, no. 11, nov 2025, pp. 7070 - 7083.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=Improving+Coding+Efficiency+of+Massive+Parallel+Intra+Prediction+Using+Alternative+References&amp;rft.jtitle=IEEE+Transactions+on+Circuits+and+Systems+I&amp;rft.volume=72&amp;rft.issue=&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2FtcasI25a.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2025&amp;rft.au=Iago+Storch&amp;rft.au=Nuno+Roma&amp;rft.au=Daniel+Palomino&amp;rft.au=Sergio+Bampi\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"tcasI25a\" href=\"bibtexbrowser.php?key=tcasI25a&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/tcasI25a.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/TCSI.2025.3564455\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"50\"><\/a>[50]<\/td><td class=\"bibitem\">G. Dias, L. Crespo, T. Schlachter, M. A. Heller, J. Krueger, P. Tom\u00e1s, N. Roma, N. Neves, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/tcasI25b.pdf\"><span class=\"bibtitle\">Reconfigurable FPU with Precision Auto-Tuning for Next-Generation Transprecision Computing<\/span><\/a>&quot;, <em>IEEE Transactions on Circuits and Systems I (accepted)<\/em>, nov 2025, pp. .\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=Reconfigurable+FPU+with+Precision+Auto-Tuning+for+Next-Generation+Transprecision+Computing&amp;rft.jtitle=IEEE+Transactions+on+Circuits+and+Systems+I+%28accepted%29&amp;rft.volume=&amp;rft.issue=&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2FtcasI25b.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2025&amp;rft.au=Guilherme+Dias&amp;rft.au=Lu%C3%ADs+Crespo&amp;rft.au=Timo+Schlachter&amp;rft.au=Marc+Andre+Heller&amp;rft.au=Jens+Krueger&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma&amp;rft.au=Nuno+Neves\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"tcasI25b\" href=\"bibtexbrowser.php?key=tcasI25b&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/tcasI25b.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"49\"><\/a>[49]<\/td><td class=\"bibitem\">A. Costa, J. D. Lopes, P. Tom\u00e1s, N. Roma, N. Neves, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/tvlsi25a.pdf\"><span class=\"bibtitle\">Real-Time ORB Accelerator for Embedded FPGA-based SoCs with ROS Integration<\/span><\/a>&quot;, <em>IEEE Transactions on Very Large Scale Integration Systems (accepted)<\/em>, aug 2025, pp. .\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=Real-Time+ORB+Accelerator+for+Embedded+FPGA-based+SoCs+with+ROS+Integration&amp;rft.jtitle=IEEE+Transactions+on+Very+Large+Scale+Integration+Systems+%28accepted%29&amp;rft.volume=&amp;rft.issue=&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Ftvlsi25a.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2025&amp;rft.au=Andre+Costa&amp;rft.au=Jos%C3%A9+Duarte+Lopes&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma&amp;rft.au=Nuno+Neves\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"tvlsi25a\" href=\"bibtexbrowser.php?key=tvlsi25a&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/tvlsi25a.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/TVLSI.2025.3601802\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"48\"><\/a>[48]<\/td><td class=\"bibitem\">M. Rosado, M. A. \u015eark\u0131\u015fla, S. Mallios, B. Akg\u00fcn, A. David, N. Roma, P. Tom\u00e1s, P. Vichoudis, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/twepp24.pdf\"><span class=\"bibtitle\">Back-end DAQ system prototype testing and integration on a full detector test system for the CMS HGCAL detector<\/span><\/a>&quot;, <em>Journal of Instrumentation - Proceedings of Topical Workshop on Electronics for Particle Physics (TWEPP'2024)<\/em>, vol. 20, no. 03, mar 2025, pp. C03028.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=Back-end+DAQ+system+prototype+testing+and+integration+on+a+full+detector+test+system+for+the+CMS+HGCAL+detector&amp;rft.jtitle=Journal+of+Instrumentation+-+Proceedings+of+Topical+Workshop+on+Electronics+for+Particle+Physics+%28TWEPP%272024%29&amp;rft.volume=20&amp;rft.issue=&amp;rft.pub=IOP+Publishing&amp;rft_id=nfvr_pubs%2Ftwepp24.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2025&amp;rft.au=Martim+Rosado&amp;rft.au=Mehmet+Alp+%C5%9Eark%C4%B1%C5%9Fla&amp;rft.au=Stavros+Mallios&amp;rft.au=Bora+Akg%C3%BCn&amp;rft.au=Andr%C3%A9+David&amp;rft.au=Nuno+Roma&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Paschalis+Vichoudis\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"twepp24\" href=\"bibtexbrowser.php?key=twepp24&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/twepp24.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1088\/1748-0221\/20\/03\/C03028\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"47\"><\/a>[47]<\/td><td class=\"bibitem\">A. Fernandes, L. Crespo, N. Neves, P. Tom\u00e1s, N. Roma, G. Falcao, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/esl24a.pdf\"><span class=\"bibtitle\">Functional Validation of the RISC-V Unlimited Vector Extension<\/span><\/a>&quot;, <em>Embedded Systems Letters<\/em>, vol. 17, no. 1, feb 2025, pp. 2\u20135.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=Functional+Validation+of+the+RISC-V+Unlimited+Vector+Extension&amp;rft.jtitle=Embedded+Systems+Letters&amp;rft.volume=17&amp;rft.issue=&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Fesl24a.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2025&amp;rft.au=Ana+Fernandes&amp;rft.au=Lu%C3%ADs+Crespo&amp;rft.au=Nuno+Neves&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma&amp;rft.au=Gabriel+Falcao\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"esl24a\" href=\"bibtexbrowser.php?key=esl24a&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/esl24a.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/LES.2024.3416820\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2024<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"46\"><\/a>[46]<\/td><td class=\"bibitem\">J. Vieira, N. Roma, G. Falcao, P. Tom\u00e1s, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/access24a.pdf\"><span class=\"bibtitle\">NDPmulator: Enabling Full-System Simulation for Near-Data Accelerators from Caches to DRAM<\/span><\/a>&quot;, <em>IEEE Access<\/em>, vol. 12, January 2024, pp. 10349\u201310365.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=NDPmulator%3A+Enabling+Full-System+Simulation+for+Near-Data+Accelerators+from+Caches+to+DRAM&amp;rft.jtitle=IEEE+Access&amp;rft.volume=12&amp;rft.issue=&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Faccess24a.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2024&amp;rft.au=Jo%C3%A3o+Vieira&amp;rft.au=Nuno+Roma&amp;rft.au=Gabriel+Falcao&amp;rft.au=Pedro+Tom%C3%A1s\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"access24a\" href=\"bibtexbrowser.php?key=access24a&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/access24a.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/ACCESS.2024.3352924\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"45\"><\/a>[45]<\/td><td class=\"bibitem\">J. Vieira, N. Roma, G. Falcao, P. Tom\u00e1s, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/cal24.pdf\"><span class=\"bibtitle\">gem5-accel: A Pre-RTL Simulation Toolchain for Accelerator Architecture Validation<\/span><\/a>&quot;, <em>IEEE Computer Architecture Letters<\/em>, vol. 23, no. 1, Jan.-June 2024, pp. 1-4.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=gem5-accel%3A+A+Pre-RTL+Simulation+Toolchain+for+Accelerator+Architecture+Validation&amp;rft.jtitle=IEEE+Computer+Architecture+Letters&amp;rft.volume=23&amp;rft.issue=&amp;rft.pub=IEEE+Computer+Society&amp;rft_id=nfvr_pubs%2Fcal24.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2024&amp;rft.au=Jo%C3%A3o+Vieira&amp;rft.au=Nuno+Roma&amp;rft.au=Gabriel+Falcao&amp;rft.au=Pedro+Tom%C3%A1s\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"cal24\" href=\"bibtexbrowser.php?key=cal24&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/cal24.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/LCA.2023.3329443\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2023<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"44\"><\/a>[44]<\/td><td class=\"bibitem\">A. Saha, N. Roma, M. Chavarr\u00edas, T. Dias, F. Pescador, V. Aranda, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/jrtip23a.pdf\"><span class=\"bibtitle\">GPU-based Parallelisation of a Versatile Video Coding Adaptive Loop Filter in Resource-Constrained Heterogeneous Embedded Platform<\/span><\/a>&quot;, <em>Journal of Real-Time Image Processing<\/em>, no. 3, mar 2023, pp. 1\u201313.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=GPU-based+Parallelisation+of+a+Versatile+Video+Coding+Adaptive+Loop+Filter+in+Resource-Constrained+Heterogeneous+Embedded+Platform&amp;rft.jtitle=Journal+of+Real-Time+Image+Processing&amp;rft.volume=&amp;rft.issue=&amp;rft.pub=Springer&amp;rft_id=nfvr_pubs%2Fjrtip23a.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2023&amp;rft.au=Anup+Saha&amp;rft.au=Nuno+Roma&amp;rft.au=Miguel+Chavarr%C3%ADas&amp;rft.au=Tiago+Dias&amp;rft.au=Fernando+Pescador&amp;rft.au=V%C3%ADctor+Aranda\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"jrtip23a\" href=\"bibtexbrowser.php?key=jrtip23a&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/jrtip23a.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1007\/s11554-023-01300-z\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2022<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"43\"><\/a>[43]<\/td><td class=\"bibitem\">N. Neves, J. M. Domingos, N. Roma, P. Tom\u00e1s, G. Falc\u00e3o, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/ieeemicro22.pdf\"><span class=\"bibtitle\">Compiling for Vector Extensions with Stream-based Specialization<\/span><\/a>&quot;, <em>IEEE Micro<\/em>, no. 5, sep 2022, pp. 49\u201358.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=Compiling+for+Vector+Extensions+with+Stream-based+Specialization&amp;rft.jtitle=IEEE+Micro&amp;rft.volume=&amp;rft.issue=&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Fieeemicro22.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2022&amp;rft.au=Nuno+Neves&amp;rft.au=Jo%C3%A3o+M%C3%A1rio+Domingos&amp;rft.au=Nuno+Roma&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Gabriel+Falc%C3%A3o\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"IEEEMicro022\" href=\"bibtexbrowser.php?key=IEEEMicro022&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/ieeemicro22.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/MM.2022.3173405\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"42\"><\/a>[42]<\/td><td class=\"bibitem\">F. Mendes, P. Tom\u00e1s and N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/jpdc22.pdf\"><span class=\"bibtitle\">Decoupling GPGPU voltage-frequency scaling for deep-learning applications<\/span><\/a>&quot;, <em>Journal of Parallel and Distributed Computing<\/em>, jul 2022, pp. 32\u201351.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=Decoupling+GPGPU+voltage-frequency+scaling+for+deep-learning+applications&amp;rft.jtitle=Journal+of+Parallel+and+Distributed+Computing&amp;rft.volume=&amp;rft.issue=&amp;rft.pub=Elsevier&amp;rft_id=nfvr_pubs%2Fjpdc22.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2022&amp;rft.au=Francisco+Mendes&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"jpdc22\" href=\"bibtexbrowser.php?key=jpdc22&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/jpdc22.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1016\/j.jpdc.2022.03.004\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"41\"><\/a>[41]<\/td><td class=\"bibitem\">L. Crespo, P. Tom\u00e1s, N. Roma, N. Neves, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/tcasIIEB22.pdf\"><span class=\"bibtitle\">Unified Posit\/IEEE-754 Vector MAC Unit for Transprecision Computing<\/span><\/a>&quot;, <em>IEEE Transactions on Circuits and Systems II: Express Briefs<\/em>, no. 5, may 2022, pp. 2478-2482.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=Unified+Posit%2FIEEE-754+Vector+MAC+Unit+for+Transprecision+Computing&amp;rft.jtitle=IEEE+Transactions+on+Circuits+and+Systems+II%3A+Express+Briefs&amp;rft.volume=&amp;rft.issue=&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2FtcasIIEB22.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2022&amp;rft.au=Lu%C3%ADs+Crespo&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma&amp;rft.au=Nuno+Neves\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"tcasIIEB22\" href=\"bibtexbrowser.php?key=tcasIIEB22&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/tcasIIEB22.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/TCSII.2022.3160191\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2021<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"40\"><\/a>[40]<\/td><td class=\"bibitem\">N. Neves, P. Tom\u00e1s and N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/jsps21.pdf\"><span class=\"bibtitle\">A Reconfigurable Posit Tensor Unit with Variable-Precision Arithmetic and Automatic Data Streaming<\/span><\/a>&quot;, <em>Journal of Signal Processing Systems<\/em>, vol. 93, no. 12, dec 2021, pp. 1365-1385.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=A+Reconfigurable+Posit+Tensor+Unit+with+Variable-Precision+Arithmetic+and+Automatic+Data+Streaming&amp;rft.jtitle=Journal+of+Signal+Processing+Systems&amp;rft.volume=93&amp;rft.issue=&amp;rft.pub=Springer&amp;rft_id=nfvr_pubs%2Fjsps21.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2021&amp;rft.au=Nuno+Neves&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"jsps21\" href=\"bibtexbrowser.php?key=jsps21&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/jsps21.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1007\/s11265-021-01687-7\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"39\"><\/a>[39]<\/td><td class=\"bibitem\">J. Vieira, N. Roma, G. Falcao, P. Tom\u00e1s, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/jsps20.pdf\"><span class=\"bibtitle\">A Compute Cache System for Signal Processing Applications<\/span><\/a>&quot;, <em>Journal of Signal Processing Systems<\/em>, vol. 93, no. 10, oct 2021, pp. 1173-1186.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=A+Compute+Cache+System+for+Signal+Processing+Applications&amp;rft.jtitle=Journal+of+Signal+Processing+Systems&amp;rft.volume=93&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Fjsps20.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2021&amp;rft.au=Jo%C3%A3o+Vieira&amp;rft.au=Nuno+Roma&amp;rft.au=Gabriel+Falcao&amp;rft.au=Pedro+Tom%C3%A1s\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"jsps20\" href=\"bibtexbrowser.php?key=jsps20&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/jsps20.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1007\/s11265-020-01626-y\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"38\"><\/a>[38]<\/td><td class=\"bibitem\">R. Porto, M. Perleberg, V. Afonso, B. Zatt, N. Roma, L. Agostini, M. Porto, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/jrtip20.pdf\"><span class=\"bibtitle\">Fast and energy-efficient approximate motion estimation architecture for real-time 4K UHD processing<\/span><\/a>&quot;, <em>Journal of Real-Time Image Processing<\/em>, vol. 18, jun 2021, pp. 723-737.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=Fast+and+energy-efficient+approximate+motion+estimation+architecture+for+real-time+4K+UHD+processing&amp;rft.jtitle=Journal+of+Real-Time+Image+Processing&amp;rft.volume=18&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Fjrtip20.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2021&amp;rft.au=Roger+Porto&amp;rft.au=Murilo+Perleberg&amp;rft.au=Vladimir+Afonso&amp;rft.au=Bruno+Zatt&amp;rft.au=Nuno+Roma&amp;rft.au=Luciano+Agostini&amp;rft.au=Marcelo+Porto\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"jrtip20\" href=\"bibtexbrowser.php?key=jrtip20&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/jrtip20.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1007\/s11554-020-01014-6\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"37\"><\/a>[37]<\/td><td class=\"bibitem\">N. Neves, P. Tom\u00e1s and N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/tc19.pdf\"><span class=\"bibtitle\">Compiler-Assisted Data Streaming for Regular Code Structures<\/span><\/a>&quot;, <em>IEEE Transactions on Computers<\/em>, vol. 70, no. 3, mar 2021, pp. 483\u2013494.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=Compiler-Assisted+Data+Streaming+for+Regular+Code+Structures&amp;rft.jtitle=IEEE+Transactions+on+Computers&amp;rft.volume=70&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Ftc19.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2021&amp;rft.au=Nuno+Neves&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"tc19\" href=\"bibtexbrowser.php?key=tc19&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/tc19.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/TC.2020.2990302\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2020<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"36\"><\/a>[36]<\/td><td class=\"bibitem\">R. Porto, M. Corr\u00eaa, J. Goebel, B. Zatt, N. Roma, L. Agostini, M. Porto, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/jrtip19.pdf\"><span class=\"bibtitle\">UHD 8K energy-quality scalable HEVC intra-prediction SAD unit hardware using optimized and configurable imprecise adders<\/span><\/a>&quot;, <em>Journal of Real-Time Image Processing<\/em>, vol. 17, no. 5, oct 2020, pp. 1685\u20131701.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=UHD+8K+energy-quality+scalable+HEVC+intra-prediction+SAD+unit+hardware+using+optimized+and+configurable+imprecise+adders&amp;rft.jtitle=Journal+of+Real-Time+Image+Processing&amp;rft.volume=17&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Fjrtip19.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2020&amp;rft.au=Roger+Porto&amp;rft.au=Marcel+Corr%C3%AAa&amp;rft.au=Jones+Goebel&amp;rft.au=Bruno+Zatt&amp;rft.au=Nuno+Roma&amp;rft.au=Luciano+Agostini&amp;rft.au=Marcelo+Porto\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"jrtip19\" href=\"bibtexbrowser.php?key=jrtip19&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/jrtip19.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1007\/s11554-019-00934-2\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2019<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"35\"><\/a>[35]<\/td><td class=\"bibitem\">J. Guerreiro, A. Ilic, N. Roma, P. Tom\u00e1s, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/access19.pdf\"><span class=\"bibtitle\">GPU Static Modeling Using PTX and Deep Structured Learning<\/span><\/a>&quot;, <em>IEEE Access<\/em>, vol. 7, dec 2019, pp. 159150\u2013159161.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=GPU+Static+Modeling+Using+PTX+and+Deep+Structured+Learning&amp;rft.jtitle=IEEE+Access&amp;rft.volume=7&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Faccess19.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2019&amp;rft.au=Jo%C3%A3o+Guerreiro&amp;rft.au=Aleksandar+Ilic&amp;rft.au=Nuno+Roma&amp;rft.au=Pedro+Tom%C3%A1s\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"access19\" href=\"bibtexbrowser.php?key=access19&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/access19.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/ACCESS.2019.2951218\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"34\"><\/a>[34]<\/td><td class=\"bibitem\">J. Guerreiro, A. Ilic, N. Roma, P. Tom\u00e1s, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/tpds19.pdf\"><span class=\"bibtitle\">Modeling and Decoupling the GPU Power Consumption for Cross-Domain DVFS<\/span><\/a>&quot;, <em>IEEE Transactions on Parallel and Distributed Systems<\/em>, vol. 30, no. 11, nov 2019, pp. 2494\u20132506.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=Modeling+and+Decoupling+the+GPU+Power+Consumption+for+Cross-Domain+DVFS&amp;rft.jtitle=IEEE+Transactions+on+Parallel+and+Distributed+Systems&amp;rft.volume=30&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Ftpds19.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2019&amp;rft.au=Jo%C3%A3o+Guerreiro&amp;rft.au=Aleksandar+Ilic&amp;rft.au=Nuno+Roma&amp;rft.au=Pedro+Tom%C3%A1s\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"tpds19\" href=\"bibtexbrowser.php?key=tpds19&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/tpds19.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/TPDS.2019.2917181\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"33\"><\/a>[33]<\/td><td class=\"bibitem\">R. Marques, L. Russo and N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/eswa19.pdf\"><span class=\"bibtitle\">Flying tourist problem: Flight time and cost minimization in complex routes<\/span><\/a>&quot;, <em>Expert Systems with Applications<\/em>, vol. 130, sep 2019, pp. 172\u2013187.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=Flying+tourist+problem%3A+Flight+time+and+cost+minimization+in+complex+routes&amp;rft.jtitle=Expert+Systems+with+Applications&amp;rft.volume=130&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Feswa19.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2019&amp;rft.au=Rafael+Marques&amp;rft.au=Lu%C3%ADs+Russo&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"eswa19\" href=\"bibtexbrowser.php?key=eswa19&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/eswa19.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1016\/j.eswa.2019.04.024\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"32\"><\/a>[32]<\/td><td class=\"bibitem\">J. Guerreiro, A. Ilic, N. Roma, P. Tom\u00e1s, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/parco17.pdf\"><span class=\"bibtitle\">DVFS-aware application classification to improve GPGPUs energy efficiency<\/span><\/a>&quot;, <em>Parallel Computing<\/em>, vol. 83, apr 2019, pp. 93\u2013117.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=DVFS-aware+application+classification+to+improve+GPGPUs+energy+efficiency&amp;rft.jtitle=Parallel+Computing&amp;rft.volume=83&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Fparco17.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2019&amp;rft.au=Jo%C3%A3o+Guerreiro&amp;rft.au=Aleksandar+Ilic&amp;rft.au=Nuno+Roma&amp;rft.au=Pedro+Tom%C3%A1s\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"parco17\" href=\"bibtexbrowser.php?key=parco17&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/parco17.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1016\/j.parco.2018.02.001\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2018<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"31\"><\/a>[31]<\/td><td class=\"bibitem\">N. Neves, P. Tom\u00e1s and N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/jsc17.pdf\"><span class=\"bibtitle\">Stream data prefetcher for the GPU memory interface<\/span><\/a>&quot;, <em>Journal of Supercomputing<\/em>, vol. 74, no. 6, jun 2018, pp. 2314\u20132328.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=Stream+data+prefetcher+for+the+GPU+memory+interface&amp;rft.jtitle=Journal+of+Supercomputing&amp;rft.volume=74&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Fjsc17.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2018&amp;rft.au=Nuno+Neves&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"jsc17\" href=\"bibtexbrowser.php?key=jsc17&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/jsc17.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1007\/s11227-018-2260-6\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"30\"><\/a>[30]<\/td><td class=\"bibitem\">B. Wang, D. F. d. Souza, M. A. Mesa, C. C. Chi, B. H. H. Juurlink, A. Ilic, N. Roma, L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/spic17.pdf\"><span class=\"bibtitle\">Highly parallel HEVC decoding for heterogeneous systems with CPU and GPU<\/span><\/a>&quot;, <em>Signal Processing: Image Communication<\/em>, vol. 62, mar 2018, pp. 93\u2013105.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=Highly+parallel+HEVC+decoding+for+heterogeneous+systems+with+CPU+and+GPU&amp;rft.jtitle=Signal+Processing%3A+Image+Communication&amp;rft.volume=62&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Fspic17.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2018&amp;rft.au=Biao+Wang&amp;rft.au=Diego+F.+de+Souza&amp;rft.au=Mauricio+Alvarez+Mesa&amp;rft.au=Chi+Ching+Chi&amp;rft.au=Ben+H.+H.+Juurlink&amp;rft.au=Aleksandar+Ilic&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"spic17\" href=\"bibtexbrowser.php?key=spic17&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/spic17.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1016\/j.image.2017.12.009\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2017<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"29\"><\/a>[29]<\/td><td class=\"bibitem\">J. Feldt, S. Miranda, F. Pratas, N. Roma, P. Tom\u00e1s, R. A. Mata, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/jcp17.pdf\"><span class=\"bibtitle\">Optimization and benchmarking of a perturbative Metropolis Monte Carlo quantum mechanics\/molecular mechanics program<\/span><\/a>&quot;, <em>The Journal of Chemical Physics<\/em>, vol. 147, no. 24, dec 2017, pp. 244105.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=Optimization+and+benchmarking+of+a+perturbative+Metropolis+Monte+Carlo+quantum+mechanics%2Fmolecular+mechanics+program&amp;rft.jtitle=The+Journal+of+Chemical+Physics&amp;rft.volume=147&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Fjcp17.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2017&amp;rft.au=Jonas+Feldt&amp;rft.au=Sebasti%C3%A3o+Miranda&amp;rft.au=Frederico+Pratas&amp;rft.au=Nuno+Roma&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Ricardo+A.+Mata\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"jcp17\" href=\"bibtexbrowser.php?key=jcp17&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/jcp17.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1063\/1.5009820\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"28\"><\/a>[28]<\/td><td class=\"bibitem\">B. Wang, D. F. d. Souza, M. A. Mesa, C. C. Chi, B. H. H. Juurlink, A. Ilic, N. Roma, L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/ijpp16.pdf\"><span class=\"bibtitle\">GPU Parallelization of HEVC In-Loop Filters<\/span><\/a>&quot;, <em>International Journal of Parallel Programming<\/em>, vol. 45, no. 6, dec 2017, pp. 1515\u20131535.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=GPU+Parallelization+of+HEVC+In-Loop+Filters&amp;rft.jtitle=International+Journal+of+Parallel+Programming&amp;rft.volume=45&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Fijpp16.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2017&amp;rft.au=Biao+Wang&amp;rft.au=Diego+F.+de+Souza&amp;rft.au=Mauricio+Alvarez+Mesa&amp;rft.au=Chi+Ching+Chi&amp;rft.au=Ben+H.+H.+Juurlink&amp;rft.au=Aleksandar+Ilic&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"ijpp16\" href=\"bibtexbrowser.php?key=ijpp16&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/ijpp16.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1007\/s10766-017-0488-z\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"27\"><\/a>[27]<\/td><td class=\"bibitem\">S. Miranda, J. Feldt, F. Pratas, R. A. Mata, N. Roma, P. Tom\u00e1s, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/ijhpca15.pdf\"><span class=\"bibtitle\">Efficient parallelization of perturbative Monte Carlo QM\/MM simulations in heterogeneous platforms<\/span><\/a>&quot;, <em>International Journal of High Performance Computing Applications<\/em>, vol. 31, no. 6, nov 2017, pp. 499\u2013516.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=Efficient+parallelization+of+perturbative+Monte+Carlo+QM%2FMM+simulations+in+heterogeneous+platforms&amp;rft.jtitle=International+Journal+of+High+Performance+Computing+Applications&amp;rft.volume=31&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Fijhpca15.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2017&amp;rft.au=Sebasti%C3%A3o+Miranda&amp;rft.au=Jonas+Feldt&amp;rft.au=Frederico+Pratas&amp;rft.au=Ricardo+A.+Mata&amp;rft.au=Nuno+Roma&amp;rft.au=Pedro+Tom%C3%A1s\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"ijhpca15\" href=\"bibtexbrowser.php?key=ijhpca15&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/ijhpca15.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1177\/1094342016649420\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"26\"><\/a>[26]<\/td><td class=\"bibitem\">N. Neves, P. Tom\u00e1s and N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/tvlsi16.pdf\"><span class=\"bibtitle\">Adaptive In-Cache Streaming for Efficient Data Management<\/span><\/a>&quot;, <em>IEEE Transactions on Very Large Scale Integration Systems<\/em>, vol. 25, no. 7, jul 2017, pp. 2130\u20132143.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=Adaptive+In-Cache+Streaming+for+Efficient+Data+Management&amp;rft.jtitle=IEEE+Transactions+on+Very+Large+Scale+Integration+Systems&amp;rft.volume=25&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Ftvlsi16.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2017&amp;rft.au=Nuno+Neves&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"tvlsi16\" href=\"bibtexbrowser.php?key=tvlsi16&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/tvlsi16.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/TVLSI.2017.2671405\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"25\"><\/a>[25]<\/td><td class=\"bibitem\">D. F. d. Souza, A. Ilic, N. Roma, L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/tmm16.pdf\"><span class=\"bibtitle\">GHEVC: An Efficient HEVC Decoder for Graphics Processing Units<\/span><\/a>&quot;, <em>IEEE Transactions on Multimedia<\/em>, vol. 19, no. 3, mar 2017, pp. 459\u2013474.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=GHEVC%3A+An+Efficient+HEVC+Decoder+for+Graphics+Processing+Units&amp;rft.jtitle=IEEE+Transactions+on+Multimedia&amp;rft.volume=19&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Ftmm16.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2017&amp;rft.au=Diego+F.+de+Souza&amp;rft.au=Aleksandar+Ilic&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"tmm16\" href=\"bibtexbrowser.php?key=tmm16&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/tmm16.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/TMM.2016.2625261\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2016<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"24\"><\/a>[24]<\/td><td class=\"bibitem\">D. Nogueira, P. Tom\u00e1s and N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/tcbb15.pdf\"><span class=\"bibtitle\">BowMapCL: Burrows-Wheeler Mapping on Multiple Heterogeneous Accelerators<\/span><\/a>&quot;, <em>Transactions on Computational Biology and Bioinformatics<\/em>, vol. 13, no. 5, sep 2016, pp. 926\u2013938.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=BowMapCL%3A+Burrows-Wheeler+Mapping+on+Multiple+Heterogeneous+Accelerators&amp;rft.jtitle=Transactions+on+Computational+Biology+and+Bioinformatics&amp;rft.volume=13&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Ftcbb15.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2016&amp;rft.au=David+Nogueira&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"tcbb15\" href=\"bibtexbrowser.php?key=tcbb15&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/tcbb15.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/TCBB.2015.2495149\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"23\"><\/a>[23]<\/td><td class=\"bibitem\">D. F. d. Souza, A. Ilic, N. Roma, L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/jrtip15.pdf\"><span class=\"bibtitle\">GPU-assisted HEVC intra decoder<\/span><\/a>&quot;, <em>Journal of Real-Time Image Processing<\/em>, vol. 12, no. 2, aug 2016, pp. 531\u2013547.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=GPU-assisted+HEVC+intra+decoder&amp;rft.jtitle=Journal+of+Real-Time+Image+Processing&amp;rft.volume=12&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Fjrtip15.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2016&amp;rft.au=Diego+F.+de+Souza&amp;rft.au=Aleksandar+Ilic&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"jrtip15\" href=\"bibtexbrowser.php?key=jrtip15&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/jrtip15.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1007\/s11554-015-0519-1\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"22\"><\/a>[22]<\/td><td class=\"bibitem\">A. Ilic, S. Momcilovic, N. Roma, L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/tcsvt15a.pdf\"><span class=\"bibtitle\">Adaptive Scheduling Framework for Real-Time Video Encoding on Heterogeneous Systems<\/span><\/a>&quot;, <em>IEEE Transactions on Circuits and Systems for Video Technology<\/em>, vol. 26, no. 3, mar 2016, pp. 597\u2013611.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=Adaptive+Scheduling+Framework+for+Real-Time+Video+Encoding+on+Heterogeneous+Systems&amp;rft.jtitle=IEEE+Transactions+on+Circuits+and+Systems+for+Video+Technology&amp;rft.volume=26&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Ftcsvt15a.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2016&amp;rft.au=Aleksandar+Ilic&amp;rft.au=Svetislav+Momcilovic&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"tcsvt15a\" href=\"bibtexbrowser.php?key=tcsvt15a&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/tcsvt15a.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/TCSVT.2015.2402893\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"21\"><\/a>[21]<\/td><td class=\"bibitem\">S. Momcilovic, N. Roma and L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/jrtip13.pdf\"><span class=\"bibtitle\">Exploiting task and data parallelism for advanced video coding on hybrid CPU + GPU platforms<\/span><\/a>&quot;, <em>Journal of Real-Time Image Processing<\/em>, vol. 11, no. 3, mar 2016, pp. 571\u2013587.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=Exploiting+task+and+data+parallelism+for+advanced+video+coding+on+hybrid+CPU+%2B+GPU+platforms&amp;rft.jtitle=Journal+of+Real-Time+Image+Processing&amp;rft.volume=11&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Fjrtip13.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2016&amp;rft.au=Svetislav+Momcilovic&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"jrtip13\" href=\"bibtexbrowser.php?key=jrtip13&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/jrtip13.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1007\/s11554-013-0357-y\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"20\"><\/a>[20]<\/td><td class=\"bibitem\">N. Neves, R. Neves, N. Horta, P. Tom\u00e1s, N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/eswa15.pdf\"><span class=\"bibtitle\">Multi-objective kernel mapping and scheduling for morphable many-core architectures<\/span><\/a>&quot;, <em>Expert Systems With Applications<\/em>, vol. 45, mar 2016, pp. 385\u2013399.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=Multi-objective+kernel+mapping+and+scheduling+for+morphable+many-core+architectures&amp;rft.jtitle=Expert+Systems+With+Applications&amp;rft.volume=45&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Feswa15.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2016&amp;rft.au=Nuno+Neves&amp;rft.au=Rui+Neves&amp;rft.au=Nuno+Horta&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"eswa15\" href=\"bibtexbrowser.php?key=eswa15&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/eswa15.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1016\/j.eswa.2015.10.004\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2015<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"19\"><\/a>[19]<\/td><td class=\"bibitem\">N. Neves, N. Sebasti\u00e3o, D. M. d. Matos, P. Tom\u00e1s, P. Flores, N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/tvlsi14.pdf\"><span class=\"bibtitle\">Multicore SIMD ASIP for Next-Generation Sequencing and Alignment Biochip Platforms<\/span><\/a>&quot;, <em>IEEE Transactions on Very Large Scale Integration Systems<\/em>, vol. 23, no. 7, jul 2015, pp. 1287\u20131300.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=Multicore+SIMD+ASIP+for+Next-Generation+Sequencing+and+Alignment+Biochip+Platforms&amp;rft.jtitle=IEEE+Transactions+on+Very+Large+Scale+Integration+Systems&amp;rft.volume=23&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Ftvlsi14.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2015&amp;rft.au=Nuno+Neves&amp;rft.au=Nuno+Sebasti%C3%A3o&amp;rft.au=David+Martins+de+Matos&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Paulo+Flores&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"tvlsi14\" href=\"bibtexbrowser.php?key=tvlsi14&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/tvlsi14.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/TVLSI.2014.2333757\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"18\"><\/a>[18]<\/td><td class=\"bibitem\">N. Sebasti\u00e3o, G. Encarna\u00e7\u00e3o and N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/ccpe13.pdf\"><span class=\"bibtitle\">Implementation and performance analysis of efficient index structures for DNA search algorithms in parallel platforms<\/span><\/a>&quot;, <em>Journal on Concurrency and Computation: Practice & Experience<\/em>, vol. 27, no. 9, jun 2015, pp. 2351\u20132368.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=Implementation+and+performance+analysis+of+efficient+index+structures+for+DNA+search+algorithms+in+parallel+platforms&amp;rft.jtitle=Journal+on+Concurrency+and+Computation%3A+Practice+%26+Experience&amp;rft.volume=27&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Fccpe13.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2015&amp;rft.au=Nuno+Sebasti%C3%A3o&amp;rft.au=Gustavo+Encarna%C3%A7%C3%A3o&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"ccpe13\" href=\"bibtexbrowser.php?key=ccpe13&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/ccpe13.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1002\/cpe.2970\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"17\"><\/a>[17]<\/td><td class=\"bibitem\">T. Ferreirinha, R. Nunes, L. Azevedo, A. Soares, F. Pratas, P. Tom\u00e1s, N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/cageo15.pdf\"><span class=\"bibtitle\">Acceleration of stochastic seismic inversion in OpenCL-based heterogeneous platforms<\/span><\/a>&quot;, <em>Computers & Geosciences<\/em>, vol. 78, may 2015, pp. 26\u201336.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=Acceleration+of+stochastic+seismic+inversion+in+OpenCL-based+heterogeneous+platforms&amp;rft.jtitle=Computers+%26+Geosciences&amp;rft.volume=78&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Fcageo15.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2015&amp;rft.au=Tom%C3%A1s+Ferreirinha&amp;rft.au=R%C3%BAben+Nunes&amp;rft.au=Leonardo+Azevedo&amp;rft.au=Am%C3%ADlcar+Soares&amp;rft.au=Frederico+Pratas&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"cageo15\" href=\"bibtexbrowser.php?key=cageo15&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/cageo15.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1016\/j.cageo.2015.02.005\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"16\"><\/a>[16]<\/td><td class=\"bibitem\">N. Neves, H. Mendes, R. Chaves, P. Tom\u00e1s, N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/ietcdt15.pdf\"><span class=\"bibtitle\">Morphable hundred-core heterogeneous architecture for energy-aware computation<\/span><\/a>&quot;, <em>IET Computers & Digital Techniques<\/em>, vol. 9, no. 1, jan 2015, pp. 49\u201362.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=Morphable+hundred-core+heterogeneous+architecture+for+energy-aware+computation&amp;rft.jtitle=IET+Computers+%26+Digital+Techniques&amp;rft.volume=9&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Fietcdt15.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2015&amp;rft.au=Nuno+Neves&amp;rft.au=Henrique+Mendes&amp;rft.au=Ricardo+Chaves&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"ietcdt15\" href=\"bibtexbrowser.php?key=ietcdt15&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/ietcdt15.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1049\/iet-cdt.2014.0078\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2014<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"15\"><\/a>[15]<\/td><td class=\"bibitem\">T. Dias, N. Roma and L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/jasp14.pdf\"><span class=\"bibtitle\">Unified transform architecture for AVC, AVS, VC-1 and HEVC high-performance codecs<\/span><\/a>&quot;, <em>EURASIP Journal on Advances in Signal Processing<\/em>, vol. 2014, jul 2014, pp. 108.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=Unified+transform+architecture+for+AVC%2C+AVS%2C+VC-1+and+HEVC+high-performance+codecs&amp;rft.jtitle=EURASIP+Journal+on+Advances+in+Signal+Processing&amp;rft.volume=2014&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Fjasp14.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2014&amp;rft.au=Tiago+Dias&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"jasp14\" href=\"bibtexbrowser.php?key=jasp14&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/jasp14.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1186\/1687-6180-2014-108\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"14\"><\/a>[14]<\/td><td class=\"bibitem\">M. Ferreira, N. Roma and L. Russo, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/bmc14.pdf\"><span class=\"bibtitle\">Cache-Oblivious parallel SIMD Viterbi decoding for sequence search in HMMER<\/span><\/a>&quot;, <em>BMC Bioinformatics<\/em>, vol. 15, may 2014, pp. 165.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=Cache-Oblivious+parallel+SIMD+Viterbi+decoding+for+sequence+search+in+HMMER&amp;rft.jtitle=BMC+Bioinformatics&amp;rft.volume=15&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Fbmc14.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2014&amp;rft.au=Miguel+Ferreira&amp;rft.au=Nuno+Roma&amp;rft.au=Lu%C3%ADs+Russo\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"bmc14\" href=\"bibtexbrowser.php?key=bmc14&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/bmc14.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1186\/1471-2105-15-165\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"13\"><\/a>[13]<\/td><td class=\"bibitem\">S. Momcilovic, A. Ilic, N. Roma, L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/tmm14.pdf\"><span class=\"bibtitle\">Dynamic Load Balancing for Real-Time Video Encoding on Heterogeneous CPU+GPU Systems<\/span><\/a>&quot;, <em>IEEE Transactions on Multimedia<\/em>, vol. 16, no. 1, jan 2014, pp. 108\u2013121.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=Dynamic+Load+Balancing+for+Real-Time+Video+Encoding+on+Heterogeneous+CPU%2BGPU+Systems&amp;rft.jtitle=IEEE+Transactions+on+Multimedia&amp;rft.volume=16&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Ftmm14.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2014&amp;rft.au=Svetislav+Momcilovic&amp;rft.au=Aleksandar+Ilic&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"tmm14\" href=\"bibtexbrowser.php?key=tmm14&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/tmm14.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/TMM.2013.2284892\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2013<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"12\"><\/a>[12]<\/td><td class=\"bibitem\">N. Sebasti\u00e3o, N. Roma and P. Flores, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/ccpe12.pdf\"><span class=\"bibtitle\">Configurable and scalable class of high performance hardware accelerators for simultaneous DNA sequence alignment<\/span><\/a>&quot;, <em>Journal on Concurrency and Computation: Practice & Experience<\/em>, vol. 25, no. 10, jul 2013, pp. 1319\u20131339.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=Configurable+and+scalable+class+of+high+performance+hardware+accelerators+for+simultaneous+DNA+sequence+alignment&amp;rft.jtitle=Journal+on+Concurrency+and+Computation%3A+Practice+%26+Experience&amp;rft.volume=25&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Fccpe12.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2013&amp;rft.au=Nuno+Sebasti%C3%A3o&amp;rft.au=Nuno+Roma&amp;rft.au=Paulo+Flores\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"ccpe12\" href=\"bibtexbrowser.php?key=ccpe12&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/ccpe12.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1002\/cpe.2934\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"11\"><\/a>[11]<\/td><td class=\"bibitem\">T. Dias, S. L\u00f3pez, N. Roma, L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/ijpp13.pdf\"><span class=\"bibtitle\">Scalable Unified Transform Architecture for Advanced Video Coding Embedded Systems<\/span><\/a>&quot;, <em>International Journal of Parallel Programming<\/em>, vol. 41, no. 2, apr 2013, pp. 236\u2013260.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=Scalable+Unified+Transform+Architecture+for+Advanced+Video+Coding+Embedded+Systems&amp;rft.jtitle=International+Journal+of+Parallel+Programming&amp;rft.volume=41&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Fijpp13.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2013&amp;rft.au=Tiago+Dias&amp;rft.au=Sebasti%C3%A1n+L%C3%B3pez&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"ijpp13\" href=\"bibtexbrowser.php?key=ijpp13&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/ijpp13.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1007\/s10766-012-0221-x\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2012<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"10\"><\/a>[10]<\/td><td class=\"bibitem\">N. Sebasti\u00e3o, N. Roma and P. Flores, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/tvlsi11.pdf\"><span class=\"bibtitle\">Integrated Hardware Architecture for Efficient Computation of the n-Best Bio-Sequence Local Alignments in Embedded Platforms<\/span><\/a>&quot;, <em>IEEE Transactions on Very Large Scale Integration Systems<\/em>, vol. 20, no. 7, jul 2012, pp. 1262\u20131275.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=Integrated+Hardware+Architecture+for+Efficient+Computation+of+the+n-Best+Bio-Sequence+Local+Alignments+in+Embedded+Platforms&amp;rft.jtitle=IEEE+Transactions+on+Very+Large+Scale+Integration+Systems&amp;rft.volume=20&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Ftvlsi11.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2012&amp;rft.au=Nuno+Sebasti%C3%A3o&amp;rft.au=Nuno+Roma&amp;rft.au=Paulo+Flores\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"tvlsi11\" href=\"bibtexbrowser.php?key=tvlsi11&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/tvlsi11.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/TVLSI.2011.2157541\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"9\"><\/a>[9]<\/td><td class=\"bibitem\">N. Sebasti\u00e3o, N. Roma and P. Flores, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/micpro11.pdf\"><span class=\"bibtitle\">Hardware accelerator architecture for simultaneous short-read DNA sequences alignment with enhanced traceback phase<\/span><\/a>&quot;, <em>Microprocessors and Microsystems: Embedded Hardware Design (MICPRO)<\/em>, vol. 36, no. 2, mar 2012, pp. 96\u2013109.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=Hardware+accelerator+architecture+for+simultaneous+short-read+DNA+sequences+alignment+with+enhanced+traceback+phase&amp;rft.jtitle=Microprocessors+and+Microsystems%3A+Embedded+Hardware+Design+%28MICPRO%29&amp;rft.volume=36&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Fmicpro11.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2012&amp;rft.au=Nuno+Sebasti%C3%A3o&amp;rft.au=Nuno+Roma&amp;rft.au=Paulo+Flores\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"micpro11\" href=\"bibtexbrowser.php?key=micpro11&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/micpro11.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1016\/j.micpro.2011.05.003\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2011<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"8\"><\/a>[8]<\/td><td class=\"bibitem\">N. Roma, L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/sigpro11.pdf\"><span class=\"bibtitle\">A tutorial overview on the properties of the discrete cosine transform for encoded image and video processing<\/span><\/a>&quot;, <em>Signal Processing<\/em>, vol. 91, no. 11, nov 2011, pp. 2443\u20132464.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=A+tutorial+overview+on+the+properties+of+the+discrete+cosine+transform+for+encoded+image+and+video+processing&amp;rft.jtitle=Signal+Processing&amp;rft.volume=91&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Fsigpro11.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2011&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"sigpro11\" href=\"bibtexbrowser.php?key=sigpro11&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/sigpro11.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1016\/j.sigpro.2011.04.015\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"7\"><\/a>[7]<\/td><td class=\"bibitem\">T. Dias, S. L\u00f3pez, N. Roma, L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/tce11.pdf\"><span class=\"bibtitle\">A flexible architecture for the computation of direct and inverse transforms in H.264\/AVC video codecs<\/span><\/a>&quot;, <em>IEEE Transactions on Consumer Electronics<\/em>, vol. 57, no. 2, may 2011, pp. 936\u2013944.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=A+flexible+architecture+for+the+computation+of+direct+and+inverse+transforms+in+H.264%2FAVC+video+codecs&amp;rft.jtitle=IEEE+Transactions+on+Consumer+Electronics&amp;rft.volume=57&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Ftce11.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2011&amp;rft.au=Tiago+Dias&amp;rft.au=Sebasti%C3%A1n+L%C3%B3pez&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"tce11\" href=\"bibtexbrowser.php?key=tce11&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/tce11.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/TCE.2011.5955243\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2007<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"6\"><\/a>[6]<\/td><td class=\"bibitem\">N. Roma, L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/jasp07.pdf\"><span class=\"bibtitle\">Efficient hybrid DCT-domain algorithm for any arbitrary integer re-size video downscaling<\/span><\/a>&quot;, <em>EURASIP Journal on Advances in Signal Processing<\/em>, vol. 2007, no. 57291, sep 2007, pp. 1\u201316.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=Efficient+hybrid+DCT-domain+algorithm+for+any+arbitrary+integer+re-size+video+downscaling&amp;rft.jtitle=EURASIP+Journal+on+Advances+in+Signal+Processing&amp;rft.volume=2007&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Fjasp07.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2007&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"jasp07\" href=\"bibtexbrowser.php?key=jasp07&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/jasp07.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1155\/2007\/57291\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"5\"><\/a>[5]<\/td><td class=\"bibitem\">T. Dias, S. Momcilovic, N. Roma, L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/jes07.pdf\"><span class=\"bibtitle\">Adaptive Motion Estimator for Autonomous Video Devices<\/span><\/a>&quot;, <em>EURASIP Journal on Embedded Systems, special issue on Embedded Systems for Portable and Mobile Video Platforms<\/em>, vol. 2007, no. 57234, may 2007, pp. 1\u201310.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=Adaptive+Motion+Estimator+for+Autonomous+Video+Devices&amp;rft.jtitle=EURASIP+Journal+on+Embedded+Systems%2C+special+issue+on+Embedded+Systems+for+Portable+and+Mobile+Video+Platforms&amp;rft.volume=2007&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Fjes07.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2007&amp;rft.au=Tiago+Dias&amp;rft.au=Svetislav+Momcilovic&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"jes07\" href=\"bibtexbrowser.php?key=jes07&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/jes07.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1155\/2007\/57234\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"4\"><\/a>[4]<\/td><td class=\"bibitem\">T. Dias, N. Roma, L. Sousa, M. Ribeiro, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/jrtip07.pdf\"><span class=\"bibtitle\">Reconfigurable architectures and processors for real-time video motion estimation<\/span><\/a>&quot;, <em>Journal of Real-Time Image Processing<\/em>, vol. 2, no. 4, dez 2007, pp. 191\u2013205.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=Reconfigurable+architectures+and+processors+for+real-time+video+motion+estimation&amp;rft.jtitle=Journal+of+Real-Time+Image+Processing&amp;rft.volume=2&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Fjrtip07.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2007&amp;rft.au=Tiago+Dias&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa&amp;rft.au=Miguel+Ribeiro\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"jrtip07\" href=\"bibtexbrowser.php?key=jrtip07&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/jrtip07.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1007\/s11554-007-0049-6\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2003<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"3\"><\/a>[3]<\/td><td class=\"bibitem\">N. Roma, L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/spic03.pdf\"><span class=\"bibtitle\">Fast transcoding architectures for insertion of non-regular shaped objects in the compressed DCT-domain<\/span><\/a>&quot;, <em>Signal Processing: Image Communication<\/em>, vol. 18, no. 8, sep 2003, pp. 659\u2013683.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=Fast+transcoding+architectures+for+insertion+of+non-regular+shaped+objects+in+the+compressed+DCT-domain&amp;rft.jtitle=Signal+Processing%3A+Image+Communication&amp;rft.volume=18&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Fspic03.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2003&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"spic03\" href=\"bibtexbrowser.php?key=spic03&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/spic03.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1016\/S0923-5965(03)00058-4\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"2\"><\/a>[2]<\/td><td class=\"bibitem\">N. Roma, L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/jvsps03.pdf\"><span class=\"bibtitle\">Automatic Synthesis of Motion Estimation Processors Based on a New Class of Hardware Architectures<\/span><\/a>&quot;, <em>Journal of VLSI Signal Processing-Systems for Signal, Image, and Video Technology<\/em>, vol. 34, no. 3, jul 2003, pp. 277\u2013290.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=Automatic+Synthesis+of+Motion+Estimation+Processors+Based+on+a+New+Class+of+Hardware+Architectures&amp;rft.jtitle=Journal+of+VLSI+Signal+Processing-Systems+for+Signal%2C+Image%2C+and+Video+Technology&amp;rft.volume=34&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Fjvsps03.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2003&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"jvsps03\" href=\"bibtexbrowser.php?key=jvsps03&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/jvsps03.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1023\/A:1023204620405\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2002<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"1\"><\/a>[1]<\/td><td class=\"bibitem\">N. Roma, L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/tcsvt02.pdf\"><span class=\"bibtitle\">Efficient and configurable full-search block-matching processors<\/span><\/a>&quot;, <em>IEEE Transactions on Circuits and Systems for Video Technology<\/em>, vol. 12, no. 12, dez 2002, pp. 1160\u20131167.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&amp;rft.atitle=Efficient+and+configurable+full-search+block-matching+processors&amp;rft.jtitle=IEEE+Transactions+on+Circuits+and+Systems+for+Video+Technology&amp;rft.volume=12&amp;rft.issue=&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Ftcsvt02.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2002&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"tcsvt02\" href=\"bibtexbrowser.php?key=tcsvt02&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/tcsvt02.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/TCSVT.2002.806818\">[doi]<\/a><\/span><\/td><\/tr>\n<\/table>\n<div class=\"sheader\"><a id=\"IntConf\"><\/a>International Conference Papers<\/div>\n<table class=\"result\">\n<tr><td colspan=\"2\" class=\"theader\">2026<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"96\"><\/a>[96]<\/td><td class=\"bibitem\">L. Crespo, A. Fernandes, G. Falc\u00e3o, P. Tom\u00e1s, N. Roma, N. Neves, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"\"><span class=\"bibtitle\">S2VEC: Compiler-Driven Stream Specialization for Linearized Vectorization<\/span><\/a>&quot;, in <em>International Conference on Supercomputing (ICS'2026)<\/em>, ACM, July, pp. .\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=S2VEC%3A+Compiler-Driven+Stream+Specialization+for+Linearized+Vectorization&amp;rft.btitle=International+Conference+on+Supercomputing+%28ICS%272026%29&amp;rft.genre=bookitem&amp;rft.pub=ACM&amp;rft_id=&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2026&amp;rft.au=Lu%C3%ADs+Crespo&amp;rft.au=Ana+Fernandes&amp;rft.au=Gabriel+Falc%C3%A3o&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma&amp;rft.au=Nuno+Neves\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"ics26\" href=\"bibtexbrowser.php?key=ics26&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"\">[url]<\/a> <a href=\"https:\/\/doi.org\/\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2025<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"95\"><\/a>[95]<\/td><td class=\"bibitem\">M. Bento, N. Neves, P. Tom\u00e1s, N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/sbacpad25.pdf\"><span class=\"bibtitle\">MIDAS: A Mapping Infrastructure for Configurable, Data-Streaming Based Domain Specific Accelerators<\/span><\/a>&quot;, in <em>37th IEEE\/SBC Symposium on Computer Architecture and High Performance Computing (SBAC-PAD'2025)<\/em>, IEEE, october, pp. 24-36.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=MIDAS%3A+A+Mapping+Infrastructure+for+Configurable%2C+Data-Streaming+Based+Domain+Specific+Accelerators&amp;rft.btitle=37th+IEEE%2FSBC+Symposium+on+Computer+Architecture+and+High+Performance+Computing+%28SBAC-PAD%272025%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Fsbacpad25.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2025&amp;rft.au=Martim+Bento&amp;rft.au=Nuno+Neves&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"sbacpad25\" href=\"bibtexbrowser.php?key=sbacpad25&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/sbacpad25.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/SBAC-PAD66369.2025.00013\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"94\"><\/a>[94]<\/td><td class=\"bibitem\">M. Rosado, P. Tom\u00e1s, N. Roma, A. David, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"\"><span class=\"bibtitle\">URAM-based asynchronous FIFO design for improved throughput and FPGA RAM usage<\/span><\/a>&quot;, in <em>35th International Conference on Field-Programmable Logic and Applications (FPL'2025)<\/em>, IEEE, september.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=URAM-based+asynchronous+FIFO+design+for+improved+throughput+and+FPGA+RAM+usage&amp;rft.btitle=35th+International+Conference+on+Field-Programmable+Logic+and+Applications+%28FPL%272025%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2025&amp;rft.au=Martim+Rosado&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma&amp;rft.au=Andr%C3%A9+David\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"fpl25\" href=\"bibtexbrowser.php?key=fpl25&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"\">[url]<\/a> <a href=\"https:\/\/doi.org\/\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"93\"><\/a>[93]<\/td><td class=\"bibitem\">N. Fernandes, P. Tom\u00e1s, N. Roma, F. Winklmeier, P. C. Mu\u00ed\u00f1o, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/ispdc25.pdf\"><span class=\"bibtitle\">Marionette: Data Structure Description and Management for Heterogeneous Computing<\/span><\/a>&quot;, in <em>24th IEEE International Symposium on Parallel and Distributed Computing (ISPDC'2025)<\/em>, IEEE, july.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Marionette%3A+Data+Structure+Description+and+Management+for+Heterogeneous+Computing&amp;rft.btitle=24th+IEEE+International+Symposium+on+Parallel+and+Distributed+Computing+%28ISPDC%272025%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Fispdc25.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2025&amp;rft.au=Nuno+Fernandes&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma&amp;rft.au=Frank+Winklmeier&amp;rft.au=Patricia+Conde+Mu%C3%AD%C3%B1o\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"ispdc25\" href=\"bibtexbrowser.php?key=ispdc25&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/ispdc25.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"92\"><\/a>[92]<\/td><td class=\"bibitem\">F. Banchelli, R. A. Bros, T. Rocha, N. Roma, P. Tom\u00e1s, N. Neves, F. Mantovani, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/iscw25b.pdf\"><span class=\"bibtitle\">RISC-V in HPC: a look into tools for performance monitoring<\/span><\/a>&quot;, in <em>International workshop on RISC-V for HPC at ISC (RISCV-HPC'2025) - co-located with ISC High Performance 2025<\/em>, Springer Lecture Notes in Computer Science (LNCS) series, june.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=RISC-V+in+HPC%3A+a+look+into+tools+for+performance+monitoring&amp;rft.btitle=International+workshop+on+RISC-V+for+HPC+at+ISC+%28RISCV-HPC%272025%29+-+co-located+with+ISC+High+Performance+2025&amp;rft.genre=bookitem&amp;rft.pub=Springer+Lecture+Notes+in+Computer+Science+%28LNCS%29+series&amp;rft_id=nfvr_pubs%2Fiscw25b.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2025&amp;rft.au=Fabio+Banchelli&amp;rft.au=Rafel+Albert+Bros&amp;rft.au=Tiago+Rocha&amp;rft.au=Nuno+Roma&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Neves&amp;rft.au=Filippo+Mantovani\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"iscw25b\" href=\"bibtexbrowser.php?key=iscw25b&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/iscw25b.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"91\"><\/a>[91]<\/td><td class=\"bibitem\">L. Crespo, N. Neves, P. Tomas, N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/iscw25a.pdf\"><span class=\"bibtitle\">Advancing the RISC-V Performance Simulation Ecosystem with Data Prefetching<\/span><\/a>&quot;, in <em>International workshop on RISC-V for HPC at ISC (RISCV-HPC'2025) - co-located with ISC High Performance 2025<\/em>, Springer Lecture Notes in Computer Science (LNCS) series, june.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Advancing+the+RISC-V+Performance+Simulation+Ecosystem+with+Data+Prefetching&amp;rft.btitle=International+workshop+on+RISC-V+for+HPC+at+ISC+%28RISCV-HPC%272025%29+-+co-located+with+ISC+High+Performance+2025&amp;rft.genre=bookitem&amp;rft.pub=Springer+Lecture+Notes+in+Computer+Science+%28LNCS%29+series&amp;rft_id=nfvr_pubs%2Fiscw25a.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2025&amp;rft.au=Lu%C3%ADs+Crespo&amp;rft.au=Nuno+Neves&amp;rft.au=Pedro+Tomas&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"iscw25a\" href=\"bibtexbrowser.php?key=iscw25a&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/iscw25a.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"90\"><\/a>[90]<\/td><td class=\"bibitem\">J. Maia, A. Silveira, G. Mid\u00f5es, N. Neves, P. Tom\u00e1s, N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/iscas25c.pdf\"><span class=\"bibtitle\">Stream-Driven Acceleration for Embedded RISC-V SoCs<\/span><\/a>&quot;, in <em>IEEE International Symposium on Circuits and Systems (ISCAS)<\/em>, IEEE, may, 2025.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Stream-Driven+Acceleration+for+Embedded+RISC-V+SoCs&amp;rft.btitle=IEEE+International+Symposium+on+Circuits+and+Systems+%28ISCAS%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Fiscas25c.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2025&amp;rft.au=Jo%C3%A3o+Maia&amp;rft.au=Ana+Silveira&amp;rft.au=Gon%C3%A7alo+Mid%C3%B5es&amp;rft.au=Nuno+Neves&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"iscas25c\" href=\"bibtexbrowser.php?key=iscas25c&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/iscas25c.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/ISCAS56072.2025.11043244\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"89\"><\/a>[89]<\/td><td class=\"bibitem\">A. Costa, P. Tom\u00e1s, N. Roma, N. Neves, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/iscas25b.pdf\"><span class=\"bibtitle\">Real-Time Orb Accelerator with ROS Integration for Embedded FPGA SoCs<\/span><\/a>&quot;, in <em>IEEE International Symposium on Circuits and Systems (ISCAS)<\/em>, IEEE, may, 2025.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Real-Time+Orb+Accelerator+with+ROS+Integration+for+Embedded+FPGA+SoCs&amp;rft.btitle=IEEE+International+Symposium+on+Circuits+and+Systems+%28ISCAS%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Fiscas25b.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2025&amp;rft.au=Andr%C3%A9+Costa&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma&amp;rft.au=Nuno+Neves\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"iscas25b\" href=\"bibtexbrowser.php?key=iscas25b&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/iscas25b.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/ISCAS56072.2025.11043935\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"88\"><\/a>[88]<\/td><td class=\"bibitem\">M. Rosado, P. Tom\u00e1s, N. Roma, A. David, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/iscas25a.pdf\"><span class=\"bibtitle\">High-Throughput Packet Aggregator for the Back-End DAQ of CERN CMS HGCAL Detector<\/span><\/a>&quot;, in <em>IEEE International Symposium on Circuits and Systems (ISCAS)<\/em>, IEEE, may, 2025.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=High-Throughput+Packet+Aggregator+for+the+Back-End+DAQ+of+CERN+CMS+HGCAL+Detector&amp;rft.btitle=IEEE+International+Symposium+on+Circuits+and+Systems+%28ISCAS%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Fiscas25a.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2025&amp;rft.au=Martim+Rosado&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma&amp;rft.au=Andr%C3%A9+David\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"iscas25a\" href=\"bibtexbrowser.php?key=iscas25a&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/iscas25a.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/ISCAS56072.2025.11044120\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"87\"><\/a>[87]<\/td><td class=\"bibitem\">T. Rocha, N. Neves, N. Roma, P. Tomas, L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/date25.pdf\"><span class=\"bibtitle\">RVEBS: Event-Based Sampling on RISC-V<\/span><\/a>&quot;, in <em>Design, Automation and Test in Europe Conference (DATE)<\/em>, IEEE, mar, 2025.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=RVEBS%3A+Event-Based+Sampling+on+RISC-V&amp;rft.btitle=Design%2C+Automation+and+Test+in+Europe+Conference+%28DATE%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Fdate25.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2025&amp;rft.au=Tiago+Rocha&amp;rft.au=Nuno+Neves&amp;rft.au=Nuno+Roma&amp;rft.au=Pedro+Tomas&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"date25\" href=\"bibtexbrowser.php?key=date25&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/date25.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"86\"><\/a>[86]<\/td><td class=\"bibitem\">G. Dias, L. Crespo, P. Tomas, N. Roma, N. Neves, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/lascas25.pdf\"><span class=\"bibtitle\">Dynamic Reconfigurable FPU for Next-Generation Transprecision Computing<\/span><\/a>&quot;, in <em>Latin America Symposium on Circuits and Systems (LASCAS)<\/em>, IEEE, feb, 2025.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Dynamic+Reconfigurable+FPU+for+Next-Generation+Transprecision+Computing&amp;rft.btitle=Latin+America+Symposium+on+Circuits+and+Systems+%28LASCAS%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Flascas25.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2025&amp;rft.au=Guilherme+Dias&amp;rft.au=Lu%C3%ADs+Crespo&amp;rft.au=Pedro+Tomas&amp;rft.au=Nuno+Roma&amp;rft.au=Nuno+Neves\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"lascas25\" href=\"bibtexbrowser.php?key=lascas25&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/lascas25.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/LASCAS64004.2025.10966239\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2024<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"85\"><\/a>[85]<\/td><td class=\"bibitem\">I. Storch, N. Roma, D. Palomino, S. Bampi, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/lascas24.pdf\"><span class=\"bibtitle\">Alternative Reference Samples to Improve Coding Efficiency for Parallel Intra Prediction Solutions<\/span><\/a>&quot;, in <em>Latin America Symposium on Circuits and Systems (LASCAS)<\/em>, IEEE, feb, 2024.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Alternative+Reference+Samples+to+Improve+Coding+Efficiency+for+Parallel+Intra+Prediction+Solutions&amp;rft.btitle=Latin+America+Symposium+on+Circuits+and+Systems+%28LASCAS%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Flascas24.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2024&amp;rft.au=Iago+Storch&amp;rft.au=Nuno+Roma&amp;rft.au=Daniel+Palomino&amp;rft.au=Sergio+Bampi\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"lascas24\" href=\"bibtexbrowser.php?key=lascas24&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/lascas24.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/LASCAS60203.2024.10506142\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2023<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"84\"><\/a>[84]<\/td><td class=\"bibitem\">A. B. Fernandes, N. Neves, L. Crespo, P. Tom\u00e1s, N. Roma, G. Falcao, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/cams23.pdf\"><span class=\"bibtitle\">A functional validation framework for the Unlimited Vector Extension<\/span><\/a>&quot;, in <em>The 1st Workshop on Computer Architecture Modeling and Simulation (CAMS)<\/em>, (no proceedings published), oct, 2023.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=A+functional+validation+framework+for+the+Unlimited+Vector+Extension&amp;rft.btitle=The+1st+Workshop+on+Computer+Architecture+Modeling+and+Simulation+%28CAMS%29&amp;rft.genre=bookitem&amp;rft.pub=%28no+proceedings+published%29&amp;rft_id=nfvr_pubs%2Fcams23.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2023&amp;rft.au=Ana+Beatriz+Fernandes&amp;rft.au=Nuno+Neves&amp;rft.au=Lu%C3%ADs+Crespo&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma&amp;rft.au=Gabriel+Falcao\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"cams23\" href=\"bibtexbrowser.php?key=cams23&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/cams23.pdf\">[pdf]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"83\"><\/a>[83]<\/td><td class=\"bibitem\">L. Crespo, P. Tom\u00e1s, N. Roma, N. Neves, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/sbac-pad23.pdf\"><span class=\"bibtitle\">Trading Performance, Power, and Area on Low-Precision Posit MAC Units for CNN Training<\/span><\/a>&quot;, in <em>IEEE International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD)<\/em>, IEEE, oct, 2023, pp. 46-56.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Trading+Performance%2C+Power%2C+and+Area+on+Low-Precision+Posit+MAC+Units+for+CNN+Training&amp;rft.btitle=IEEE+International+Symposium+on+Computer+Architecture+and+High+Performance+Computing+%28SBAC-PAD%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Fsbac-pad23.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2023&amp;rft.au=Lu%C3%ADs+Crespo&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma&amp;rft.au=Nuno+Neves\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"sbac-pad23\" href=\"bibtexbrowser.php?key=sbac-pad23&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/sbac-pad23.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/SBAC-PAD59825.2023.00014\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"82\"><\/a>[82]<\/td><td class=\"bibitem\">I. Storch, N. Roma, D. Palomino, S. Bampi, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/eusipco23.pdf\"><span class=\"bibtitle\">GPU Acceleration of MIP Intra Prediction in VVC<\/span><\/a>&quot;, in <em>European Signal Processing Conference (EUSIPCO)<\/em>, EURASIP, sep, 2023.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=GPU+Acceleration+of+MIP+Intra+Prediction+in+VVC&amp;rft.btitle=European+Signal+Processing+Conference+%28EUSIPCO%29&amp;rft.genre=bookitem&amp;rft.pub=EURASIP&amp;rft_id=nfvr_pubs%2Feusipco23.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2023&amp;rft.au=Iago+Storch&amp;rft.au=Nuno+Roma&amp;rft.au=Daniel+Palomino&amp;rft.au=Sergio+Bampi\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"eusipco23\" href=\"bibtexbrowser.php?key=eusipco23&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/eusipco23.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.23919\/EUSIPCO58844.2023.10290037\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"81\"><\/a>[81]<\/td><td class=\"bibitem\">J. M. Domingos, T. Rocha, N. Neves, N. Roma, P. Tom\u00e1s, L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/asap23.pdf\"><span class=\"bibtitle\">Supporting RISC-V Performance Counters Through Performance Analysis Tools for Linux<\/span><\/a>&quot;, in <em>IEEE International Conference on Application-specific Systems, Architectures, and Processors (ASAP)<\/em>, IEEE, jul, 2023.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Supporting+RISC-V+Performance+Counters+Through+Performance+Analysis+Tools+for+Linux&amp;rft.btitle=IEEE+International+Conference+on+Application-specific+Systems%2C+Architectures%2C+and+Processors+%28ASAP%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Fasap23.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2023&amp;rft.au=Jo%C3%A3o+M%C3%A1rio+Domingos&amp;rft.au=Tiago+Rocha&amp;rft.au=Nuno+Neves&amp;rft.au=Nuno+Roma&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"asap23\" href=\"bibtexbrowser.php?key=asap23&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/asap23.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/ASAP57973.2023.00027\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"80\"><\/a>[80]<\/td><td class=\"bibitem\">T. Malcata, N. Sebasti\u00e3o, T. M. Dias, N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/dasip23.pdf\"><span class=\"bibtitle\">Neural Network Predictor for Fast Channel Change on DVB Set-Top-Boxes<\/span><\/a>&quot;, in <em>Workshop on Design and Architectures for Signal and Image Processing (DASIP)<\/em>, Springer, jan, 2023, pp. 40\u201352.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Neural+Network+Predictor+for+Fast+Channel+Change+on+DVB+Set-Top-Boxes&amp;rft.btitle=Workshop+on+Design+and+Architectures+for+Signal+and+Image+Processing+%28DASIP%29&amp;rft.genre=bookitem&amp;rft.pub=Springer&amp;rft_id=nfvr_pubs%2Fdasip23.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2023&amp;rft.au=Tom%C3%A1s+Malcata&amp;rft.au=Nuno+Sebasti%C3%A3o&amp;rft.au=Tiago+M+Dias&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"dasip23\" href=\"bibtexbrowser.php?key=dasip23&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/dasip23.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1007\/978-3-031-29970-4_4\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2022<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"79\"><\/a>[79]<\/td><td class=\"bibitem\">J. Vieira, N. Roma, G. Falcao, P. Tom\u00e1s, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/sbac-pad22.pdf\"><span class=\"bibtitle\">gem5-ndp: Near-Data Processing Architecture Simulation From Low Level Caches to DRAM<\/span><\/a>&quot;, in <em>IEEE International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD)<\/em>, IEEE, nov, 2022, pp. 41\u201350.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=gem5-ndp%3A+Near-Data+Processing+Architecture+Simulation+From+Low+Level+Caches+to+DRAM&amp;rft.btitle=IEEE+International+Symposium+on+Computer+Architecture+and+High+Performance+Computing+%28SBAC-PAD%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Fsbac-pad22.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2022&amp;rft.au=Jo%C3%A3o+Vieira&amp;rft.au=Nuno+Roma&amp;rft.au=Gabriel+Falcao&amp;rft.au=Pedro+Tom%C3%A1s\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"sbac-pad22\" href=\"bibtexbrowser.php?key=sbac-pad22&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/sbac-pad22.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/SBAC-PAD55451.2022.00015\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"78\"><\/a>[78]<\/td><td class=\"bibitem\">M. Rosado, S. Mallios, P. Tom\u00e1s, N. Roma, A. David, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/rsp22.pdf\"><span class=\"bibtitle\">Early prototyping and testing of CERN LHC CMS high-granularity calorimeter slow-control system<\/span><\/a>&quot;, in <em>International Workshop on Rapid System Prototyping (RSP)<\/em>, IEEE, oct, 2022.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Early+prototyping+and+testing+of+CERN+LHC+CMS+high-granularity+calorimeter+slow-control+system&amp;rft.btitle=International+Workshop+on+Rapid+System+Prototyping+%28RSP%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Frsp22.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2022&amp;rft.au=Martim+Rosado&amp;rft.au=Stavros+Mallios&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma&amp;rft.au=Andr%C3%A9+David\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"rsp22\" href=\"bibtexbrowser.php?key=rsp22&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/rsp22.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/RSP57251.2022.10039014\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"77\"><\/a>[77]<\/td><td class=\"bibitem\">M. M. Correa, N. Roma, D. M. V. Palomimo, G. R. Correa, L. Agostini, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/iscas22b.pdf\"><span class=\"bibtitle\">Mode-Adaptive Subsampling of SAD\/SSE Operations for Intra Prediction Cost Reduction<\/span><\/a>&quot;, in <em>IEEE International Symposium on Circuits & Systems (ISCAS)<\/em>, IEEE, may, 2022.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Mode-Adaptive+Subsampling+of+SAD%2FSSE+Operations+for+Intra+Prediction+Cost+Reduction&amp;rft.btitle=IEEE+International+Symposium+on+Circuits+%26+Systems+%28ISCAS%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Fiscas22b.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2022&amp;rft.au=Marcel+Moscarelli+Correa&amp;rft.au=Nuno+Roma&amp;rft.au=Daniel+Munari+Vilchez+Palomimo&amp;rft.au=Guilherme+Ribeiro+Correa&amp;rft.au=Luciano+Agostini\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"iscas22b\" href=\"bibtexbrowser.php?key=iscas22b&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/iscas22b.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/ISCAS48785.2022.9937507\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2021<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"76\"><\/a>[76]<\/td><td class=\"bibitem\">J. M\u00e1rio, N. Neves, N. Roma, P. Tom\u00e1s, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/isca21.pdf\"><span class=\"bibtitle\">Unlimited Vector Extension with Data Streaming Support<\/span><\/a>&quot;, in <em>International Symposium on Computer Architecture (ISCA)<\/em>, jun, 2021.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Unlimited+Vector+Extension+with+Data+Streaming+Support&amp;rft.btitle=International+Symposium+on+Computer+Architecture+%28ISCA%29&amp;rft.genre=bookitem&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Fisca21.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2021&amp;rft.au=Jo%C3%A3o+M%C3%A1rio&amp;rft.au=Nuno+Neves&amp;rft.au=Nuno+Roma&amp;rft.au=Pedro+Tom%C3%A1s\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"isca21\" href=\"bibtexbrowser.php?key=isca21&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/isca21.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/ISCA52012.2021.00025\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"75\"><\/a>[75]<\/td><td class=\"bibitem\">G. Raposo, P. Tom\u00e1s and N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/icassp21.pdf\"><span class=\"bibtitle\">PositNN: Training Deep Neural Networks with Mixed Low-Precision Posit<\/span><\/a>&quot;, in <em>International Conference on Acoustics, Speech, and Signal Processing (ICASSP)<\/em>, jun, 2021.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=PositNN%3A+Training+Deep+Neural+Networks+with+Mixed+Low-Precision+Posit&amp;rft.btitle=International+Conference+on+Acoustics%2C+Speech%2C+and+Signal+Processing+%28ICASSP%29&amp;rft.genre=bookitem&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Ficassp21.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2021&amp;rft.au=Gon%C3%A7alo+Raposo&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"icassp21\" href=\"bibtexbrowser.php?key=icassp21&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/icassp21.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/ICASSP39728.2021.9413919\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"74\"><\/a>[74]<\/td><td class=\"bibitem\">M. Pinho, P. Tom\u00e1s and N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/hpcs20.pdf\"><span class=\"bibtitle\">Packing and Fusing Narrow-Width Vector Operations for Energy-Efficient SIMD<\/span><\/a>&quot;, in <em>International Conference on High Performance Computing & Simulation (HPCS)<\/em>, mar, 2021.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Packing+and+Fusing+Narrow-Width+Vector+Operations+for+Energy-Efficient+SIMD&amp;rft.btitle=International+Conference+on+High+Performance+Computing+%26+Simulation+%28HPCS%29&amp;rft.genre=bookitem&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Fhpcs20.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2021&amp;rft.au=Miguel+Pinho&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"hpcs20\" href=\"bibtexbrowser.php?key=hpcs20&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/hpcs20.pdf\">[pdf]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2020<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"73\"><\/a>[73]<\/td><td class=\"bibitem\">N. Neves, P. Tom\u00e1s and N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/sips20.pdf\"><span class=\"bibtitle\">Dynamic Fused Multiply-Accumulate Posit Unit with Variable Exponent Size for Low-Precision DSP Applications<\/span><\/a>&quot;, in <em>IEEE Workshop on Signal Processing Systems (SiPS)<\/em>, oct, 2020, pp. 1-6.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Dynamic+Fused+Multiply-Accumulate+Posit+Unit+with+Variable+Exponent+Size+for+Low-Precision+DSP+Applications&amp;rft.btitle=IEEE+Workshop+on+Signal+Processing+Systems+%28SiPS%29&amp;rft.genre=bookitem&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Fsips20.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2020&amp;rft.au=Nuno+Neves&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"sips20\" href=\"bibtexbrowser.php?key=sips20&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/sips20.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/SiPS50750.2020.9195256\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"72\"><\/a>[72]<\/td><td class=\"bibitem\">F. Mendes, P. Tom\u00e1s and N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/sbac-pad20.pdf\"><span class=\"bibtitle\">Exploiting Non-conventional DVFS on GPUs: Application to Deep Learning<\/span><\/a>&quot;, in <em>IEEE International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD)<\/em>, IEEE, sep, 2020, pp. 1\u20139.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Exploiting+Non-conventional+DVFS+on+GPUs%3A+Application+to+Deep+Learning&amp;rft.btitle=IEEE+International+Symposium+on+Computer+Architecture+and+High+Performance+Computing+%28SBAC-PAD%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Fsbac-pad20.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2020&amp;rft.au=Francisco+Mendes&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"sbac-pad20\" href=\"bibtexbrowser.php?key=sbac-pad20&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/sbac-pad20.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/SBAC-PAD49847.2020.00012\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"71\"><\/a>[71]<\/td><td class=\"bibitem\">R. Porto, B. Zatt, N. Roma, L. Agostini, M. Porto, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/sbcci20.pdf\"><span class=\"bibtitle\">2PSA: An Optimized and Flexible Power-Precision Scalable Adder<\/span><\/a>&quot;, in <em>Symposium on Integrated Circuits and Systems Design (SBCCI)<\/em>, IEEE, aug, 2020, pp. 1\u20136.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=2PSA%3A+An+Optimized+and+Flexible+Power-Precision+Scalable+Adder&amp;rft.btitle=Symposium+on+Integrated+Circuits+and+Systems+Design+%28SBCCI%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Fsbcci20.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2020&amp;rft.au=Roger+Porto&amp;rft.au=Bruno+Zatt&amp;rft.au=Nuno+Roma&amp;rft.au=Luciano+Agostini&amp;rft.au=Marcelo+Porto\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"sbcci20\" href=\"bibtexbrowser.php?key=sbcci20&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/sbcci20.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/SBCCI50935.2020.9189917\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"70\"><\/a>[70]<\/td><td class=\"bibitem\">N. Neves, P. Tom\u00e1s and N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/asap20.pdf\"><span class=\"bibtitle\">Reconfigurable Stream-based Tensor Unit with Variable-Precision Posit Arithmetic<\/span><\/a>&quot;, in <em>IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP)<\/em>, IEEE, jul, 2020, pp. 149\u2013156.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Reconfigurable+Stream-based+Tensor+Unit+with+Variable-Precision+Posit+Arithmetic&amp;rft.btitle=IEEE+International+Conference+on+Application-specific+Systems%2C+Architectures+and+Processors+%28ASAP%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Fasap20.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2020&amp;rft.au=Nuno+Neves&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"asap20\" href=\"bibtexbrowser.php?key=asap20&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/asap20.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/ASAP49362.2020.00033\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"69\"><\/a>[69]<\/td><td class=\"bibitem\">J. Vieira, N. Roma, G. Falcao, P. Tom\u00e1s, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/icassp20.pdf\"><span class=\"bibtitle\">Processing Convolutional Neural Networks on Cache<\/span><\/a>&quot;, in <em>IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP)<\/em>, IEEE, may, 2020, pp. 1658\u20131662.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Processing+Convolutional+Neural+Networks+on+Cache&amp;rft.btitle=IEEE+International+Conference+on+Acoustics%2C+Speech+and+Signal+Processing+%28ICASSP%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Ficassp20.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2020&amp;rft.au=Jo%C3%A3o+Vieira&amp;rft.au=Nuno+Roma&amp;rft.au=Gabriel+Falcao&amp;rft.au=Pedro+Tom%C3%A1s\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"icassp20\" href=\"bibtexbrowser.php?key=icassp20&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/icassp20.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/ICASSP40776.2020.9054326\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2019<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"68\"><\/a>[68]<\/td><td class=\"bibitem\">P. S\u00e1, H. Aidos, N. Roma, P. Tom\u00e1s, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/eusipco19.pdf\"><span class=\"bibtitle\">Heart Disease Detection Architecture for Lead I Off-the-Person ECG Monitoring Devices<\/span><\/a>&quot;, in <em>European Signal Processing Conference (EUSIPCO)<\/em>, IEEE, sep, 2019, pp. 1\u20135.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Heart+Disease+Detection+Architecture+for+Lead+I+Off-the-Person+ECG+Monitoring+Devices&amp;rft.btitle=European+Signal+Processing+Conference+%28EUSIPCO%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Feusipco19.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2019&amp;rft.au=Pedro+S%C3%A1&amp;rft.au=Helena+Aidos&amp;rft.au=Nuno+Roma&amp;rft.au=Pedro+Tom%C3%A1s\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"eusipco19\" href=\"bibtexbrowser.php?key=eusipco19&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/eusipco19.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.23919\/EUSIPCO.2019.8902791\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"67\"><\/a>[67]<\/td><td class=\"bibitem\">R. Porto, L. Agostini, B. Zatt, N. Roma, M. Porto, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/lascas19.pdf\"><span class=\"bibtitle\">Power-Efficient Approximate SAD Architecture with LOA Imprecise Adders<\/span><\/a>&quot;, in <em>IEEE Latin American Symposium on Circuits & Systems (LASCAS)<\/em>, R. S. Murphy, Ed., IEEE, feb, 2019, pp. 65\u201368.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Power-Efficient+Approximate+SAD+Architecture+with+LOA+Imprecise+Adders&amp;rft.btitle=IEEE+Latin+American+Symposium+on+Circuits+%26+Systems+%28LASCAS%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Flascas19.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2019&amp;rft.au=Roger+Porto&amp;rft.au=Luciano+Agostini&amp;rft.au=Bruno+Zatt&amp;rft.au=Nuno+Roma&amp;rft.au=Marcelo+Porto\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"lascas19\" href=\"bibtexbrowser.php?key=lascas19&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/lascas19.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/LASCAS.2019.8667554\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2018<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"66\"><\/a>[66]<\/td><td class=\"bibitem\">J. Vieira, N. Roma, P. Tom\u00e1s, P. Ienne, G. Falcao, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/sbac-pad18.pdf\"><span class=\"bibtitle\">Exploiting Compute Caches for Memory Bound Vector Operations<\/span><\/a>&quot;, in <em>30th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD)<\/em>, IEEE, feb, 2018, pp. 197\u2013200.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Exploiting+Compute+Caches+for+Memory+Bound+Vector+Operations&amp;rft.btitle=30th+International+Symposium+on+Computer+Architecture+and+High+Performance+Computing+%28SBAC-PAD%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Fsbac-pad18.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2018&amp;rft.au=Jo%C3%A3o+Vieira&amp;rft.au=Nuno+Roma&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Paolo+Ienne&amp;rft.au=Gabriel+Falcao\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"sbac-pad18\" href=\"bibtexbrowser.php?key=sbac-pad18&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/sbac-pad18.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/CAHPC.2018.8645905\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"65\"><\/a>[65]<\/td><td class=\"bibitem\">J. Guerreiro, A. Ilic, N. Roma, P. Tom\u00e1s, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/hpca18.pdf\"><span class=\"bibtitle\">GPGPU Power Modeling for Multi-domain Voltage-Frequency Scaling<\/span><\/a>&quot;, in <em>IEEE International Symposium on High Performance Computer Architecture (HPCA)<\/em>, IEEE Computer Society, feb, 2018, pp. 789\u2013800.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=GPGPU+Power+Modeling+for+Multi-domain+Voltage-Frequency+Scaling&amp;rft.btitle=IEEE+International+Symposium+on+High+Performance+Computer+Architecture+%28HPCA%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE+Computer+Society&amp;rft_id=nfvr_pubs%2Fhpca18.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2018&amp;rft.au=Jo%C3%A3o+Guerreiro&amp;rft.au=Aleksandar+Ilic&amp;rft.au=Nuno+Roma&amp;rft.au=Pedro+Tom%C3%A1s\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"hpca18\" href=\"bibtexbrowser.php?key=hpca18&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/hpca18.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/HPCA.2018.00072\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2017<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"64\"><\/a>[64]<\/td><td class=\"bibitem\">R. Porto, L. Agostini, B. Zatt, M. Porto, N. Roma, L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/mmsp17.pdf\"><span class=\"bibtitle\">Energy-efficient motion estimation with approximate arithmetic<\/span><\/a>&quot;, in <em>19th IEEE International Workshop on Multimedia Signal Processing (MMSP)<\/em>, IEEE, oct, 2017, pp. 1\u20136.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Energy-efficient+motion+estimation+with+approximate+arithmetic&amp;rft.btitle=19th+IEEE+International+Workshop+on+Multimedia+Signal+Processing+%28MMSP%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Fmmsp17.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2017&amp;rft.au=Roger+Porto&amp;rft.au=Luciano+Agostini&amp;rft.au=Bruno+Zatt&amp;rft.au=Marcelo+Porto&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"mmsp17\" href=\"bibtexbrowser.php?key=mmsp17&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/mmsp17.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/MMSP.2017.8122248\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2016<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"63\"><\/a>[63]<\/td><td class=\"bibitem\">B. Wang, M. A. Mesa, C. C. Chi, B. Juurlink, D. d. Souza, A. Ilic, N. Roma, L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/mmsp16.pdf\"><span class=\"bibtitle\">Efficient HEVC decoder for heterogeneous CPU with GPU systems<\/span><\/a>&quot;, in <em>18th IEEE International Workshop on Multimedia Signal Processing (MMSP)<\/em>, IEEE, sep, 2016, pp. 1\u20136.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Efficient+HEVC+decoder+for+heterogeneous+CPU+with+GPU+systems&amp;rft.btitle=18th+IEEE+International+Workshop+on+Multimedia+Signal+Processing+%28MMSP%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Fmmsp16.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2016&amp;rft.au=Biao+Wang&amp;rft.au=Mauricio+Alvarez+Mesa&amp;rft.au=Chi+Ching+Chi&amp;rft.au=Ben+Juurlink&amp;rft.au=Diego+de+Souza&amp;rft.au=Aleksandar+Ilic&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"mmsp16\" href=\"bibtexbrowser.php?key=mmsp16&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/mmsp16.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/MMSP.2016.7813353\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"62\"><\/a>[62]<\/td><td class=\"bibitem\">N. Neves, A. Mussio, F. Gon\u00e7alves, P. Tom\u00e1s, N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/uchpc16.pdf\"><span class=\"bibtitle\">In-Cache Streaming: Morphable Infrastructure for Many-Core Processing Systems<\/span><\/a>&quot;, in <em>International Workshop on UnConventional High Performance Computing (UCHPC)<\/em>, F. Desprez et al., Eds., Springer, aug, 2016, pp. 775\u2013787.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=In-Cache+Streaming%3A+Morphable+Infrastructure+for+Many-Core+Processing+Systems&amp;rft.btitle=International+Workshop+on+UnConventional+High+Performance+Computing+%28UCHPC%29&amp;rft.genre=bookitem&amp;rft.pub=Springer&amp;rft_id=nfvr_pubs%2Fuchpc16.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2016&amp;rft.au=Nuno+Neves&amp;rft.au=Adrien+Mussio&amp;rft.au=Fabien+Gon%C3%A7alves&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"uchpc16\" href=\"bibtexbrowser.php?key=uchpc16&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/uchpc16.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1007\/978-3-319-58943-5_62\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"61\"><\/a>[61]<\/td><td class=\"bibitem\">J. Guerreiro, A. Ilic, N. Roma, P. Tom\u00e1s, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/heteropar16.pdf\"><span class=\"bibtitle\">Performance and Power-Aware Classification for Frequency Scaling of GPGPU Applications<\/span><\/a>&quot;, in <em>International Workshop on Algorithms, Models and Tools for Parallel Computing on Heterogeneous Platforms (HeteroPar)<\/em>, F. Desprez et al., Eds., Springer, aug, 2016, pp. 134\u2013146.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Performance+and+Power-Aware+Classification+for+Frequency+Scaling+of+GPGPU+Applications&amp;rft.btitle=International+Workshop+on+Algorithms%2C+Models+and+Tools+for+Parallel+Computing+on+Heterogeneous+Platforms+%28HeteroPar%29&amp;rft.genre=bookitem&amp;rft.pub=Springer&amp;rft_id=nfvr_pubs%2Fheteropar16.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2016&amp;rft.au=Jo%C3%A3o+Guerreiro&amp;rft.au=Aleksandar+Ilic&amp;rft.au=Nuno+Roma&amp;rft.au=Pedro+Tom%C3%A1s\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"heteropar16\" href=\"bibtexbrowser.php?key=heteropar16&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/heteropar16.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1007\/978-3-319-58943-5_11\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"60\"><\/a>[60]<\/td><td class=\"bibitem\">M. T. Cruz, P. Tom\u00e1s and N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/hpcs16.pdf\"><span class=\"bibtitle\">Unsupervised variable-grained online phase clustering for heterogeneous\/morphable processors<\/span><\/a>&quot;, in <em>International Conference on High Performance Computing & Simulation, (HPCS)<\/em>, IEEE, jul, 2016, pp. 858\u2013865.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Unsupervised+variable-grained+online+phase+clustering+for+heterogeneous%2Fmorphable+processors&amp;rft.btitle=International+Conference+on+High+Performance+Computing+%26+Simulation%2C+%28HPCS%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Fhpcs16.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2016&amp;rft.au=Miguel+Tairum+Cruz&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"hpcs16\" href=\"bibtexbrowser.php?key=hpcs16&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/hpcs16.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/HPCSim.2016.7568424\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"59\"><\/a>[59]<\/td><td class=\"bibitem\">R. Pinheiro, N. Roma and P. Tom\u00e1s, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/vecpar16.pdf\"><span class=\"bibtitle\">A Cross-Core Performance Model for Heterogeneous Many-Core Architectures<\/span><\/a>&quot;, in <em>International Meeting on High Performance Computing for Computational Science (VECPAR'2016)<\/em>, I. Dutra et al., Eds., Springer, jun, pp. 101\u2013111.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=A+Cross-Core+Performance+Model+for+Heterogeneous+Many-Core+Architectures&amp;rft.btitle=International+Meeting+on+High+Performance+Computing+for+Computational+Science+%28VECPAR%272016%29&amp;rft.genre=bookitem&amp;rft.pub=Springer&amp;rft_id=nfvr_pubs%2Fvecpar16.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2016&amp;rft.au=Rui+Pinheiro&amp;rft.au=Nuno+Roma&amp;rft.au=Pedro+Tom%C3%A1s\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"vecpar16\" href=\"bibtexbrowser.php?key=vecpar16&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/vecpar16.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1007\/978-3-319-61982-8_11\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2015<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"58\"><\/a>[58]<\/td><td class=\"bibitem\">S. Momcilovic, N. Roma, L. Sousa, I. Z. Milentijevic, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/ism15.pdf\"><span class=\"bibtitle\">Run-Time Machine Learning for HEVC\/H.265 Fast Partitioning Decision<\/span><\/a>&quot;, in <em>IEEE International Symposium on Multimedia (ISM)<\/em>, IEEE Computer Society, dec, 2015, pp. 347\u2013350.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Run-Time+Machine+Learning+for+HEVC%2FH.265+Fast+Partitioning+Decision&amp;rft.btitle=IEEE+International+Symposium+on+Multimedia+%28ISM%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE+Computer+Society&amp;rft_id=nfvr_pubs%2Fism15.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2015&amp;rft.au=Svetislav+Momcilovic&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa&amp;rft.au=Ivan+Z.+Milentijevic\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"ism15\" href=\"bibtexbrowser.php?key=ism15&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/ism15.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/ISM.2015.70\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"57\"><\/a>[57]<\/td><td class=\"bibitem\">D. F. d. Souza, A. Ilic, N. Roma, L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/globalsip15.pdf\"><span class=\"bibtitle\">GPU acceleration of the HEVC decoder inter prediction module<\/span><\/a>&quot;, in <em>IEEE Global Conference on Signal and Information Processing (GlobalSIP)<\/em>, IEEE, dec, 2015, pp. 1245\u20131249.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=GPU+acceleration+of+the+HEVC+decoder+inter+prediction+module&amp;rft.btitle=IEEE+Global+Conference+on+Signal+and+Information+Processing+%28GlobalSIP%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Fglobalsip15.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2015&amp;rft.au=Diego+F.+de+Souza&amp;rft.au=Aleksandar+Ilic&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"globalsip15\" href=\"bibtexbrowser.php?key=globalsip15&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/globalsip15.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/GlobalSIP.2015.7418397\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"56\"><\/a>[56]<\/td><td class=\"bibitem\">M. Rodrigues, N. Roma and P. Tom\u00e1s, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/euc15.pdf\"><span class=\"bibtitle\">Fast and Scalable Thread Migration for Multi-core Architectures<\/span><\/a>&quot;, in <em>IEEE International Conference on Embedded and Ubiquitous Computing (EUC)<\/em>, E. Bozorgzadeh et al., Eds., IEEE Computer Society, oct, 2015, pp. 9\u201316.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Fast+and+Scalable+Thread+Migration+for+Multi-core+Architectures&amp;rft.btitle=IEEE+International+Conference+on+Embedded+and+Ubiquitous+Computing+%28EUC%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE+Computer+Society&amp;rft_id=nfvr_pubs%2Feuc15.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2015&amp;rft.au=Miguel+Rodrigues&amp;rft.au=Nuno+Roma&amp;rft.au=Pedro+Tom%C3%A1s\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"euc15\" href=\"bibtexbrowser.php?key=euc15&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/euc15.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/EUC.2015.36\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"55\"><\/a>[55]<\/td><td class=\"bibitem\">N. Neves, P. Tom\u00e1s and N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/fpl15.pdf\"><span class=\"bibtitle\">Efficient data-stream management for shared-memory many-core systems<\/span><\/a>&quot;, in <em>International Conference on Field Programmable Logic and Applications (FPL)<\/em>, IEEE, sep, 2015, pp. 1\u20138.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Efficient+data-stream+management+for+shared-memory+many-core+systems&amp;rft.btitle=International+Conference+on+Field+Programmable+Logic+and+Applications+%28FPL%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Ffpl15.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2015&amp;rft.au=Nuno+Neves&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"fpl15\" href=\"bibtexbrowser.php?key=fpl15&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/fpl15.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/FPL.2015.7293960\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"54\"><\/a>[54]<\/td><td class=\"bibitem\">D. F. d. Souza, A. Ilic, N. Roma, L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/samos15.pdf\"><span class=\"bibtitle\">HEVC in-loop filters GPU parallelization in embedded systems<\/span><\/a>&quot;, in <em>International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS)<\/em>, D. Soudris, L. Carro, Eds., IEEE, jul, 2015, pp. 123\u2013130.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=HEVC+in-loop+filters+GPU+parallelization+in+embedded+systems&amp;rft.btitle=International+Conference+on+Embedded+Computer+Systems%3A+Architectures%2C+Modeling%2C+and+Simulation+%28SAMOS%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Fsamos15.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2015&amp;rft.au=Diego+F.+de+Souza&amp;rft.au=Aleksandar+Ilic&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"samos15\" href=\"bibtexbrowser.php?key=samos15&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/samos15.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/SAMOS.2015.7363667\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"53\"><\/a>[53]<\/td><td class=\"bibitem\">D. F. d. Souza, A. Ilic, N. Roma, L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/icme15.pdf\"><span class=\"bibtitle\">Towards GPU HEVC intra decoding: Seizing fine-grain parallelism<\/span><\/a>&quot;, in <em>IEEE International Conference on Multimedia and Expo (ICME)<\/em>, IEEE Computer Society, jun, 2015, pp. 1\u20136.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Towards+GPU+HEVC+intra+decoding%3A+Seizing+fine-grain+parallelism&amp;rft.btitle=IEEE+International+Conference+on+Multimedia+and+Expo+%28ICME%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE+Computer+Society&amp;rft_id=nfvr_pubs%2Ficme15.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2015&amp;rft.au=Diego+F.+de+Souza&amp;rft.au=Aleksandar+Ilic&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"icme15\" href=\"bibtexbrowser.php?key=icme15&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/icme15.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/ICME.2015.7177515\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"52\"><\/a>[52]<\/td><td class=\"bibitem\">T. Dias, N. Roma and L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/iscas15.pdf\"><span class=\"bibtitle\">High performance IP core for HEVC quantization<\/span><\/a>&quot;, in <em>IEEE International Symposium on Circuits and Systems (ISCAS)<\/em>, IEEE, may, 2015, pp. 2828\u20132831.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=High+performance+IP+core+for+HEVC+quantization&amp;rft.btitle=IEEE+International+Symposium+on+Circuits+and+Systems+%28ISCAS%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Fiscas15.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2015&amp;rft.au=Tiago+Dias&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"iscas15\" href=\"bibtexbrowser.php?key=iscas15&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/iscas15.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/ISCAS.2015.7169275\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"51\"><\/a>[51]<\/td><td class=\"bibitem\">M. T. Cruz, P. Tom\u00e1s and N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/iwbbio15.pdf\"><span class=\"bibtitle\">Energy-Efficient Architecture for DP Local Sequence Alignment: Exploiting ILP and DLP<\/span><\/a>&quot;, in <em>International Conference on Bioinformatics and Biomedical Engineering (IWBBIO)<\/em>, F. M. O. Guzman, I. Rojas, Eds., Springer, apr, 2015, pp. 194\u2013206.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Energy-Efficient+Architecture+for+DP+Local+Sequence+Alignment%3A+Exploiting+ILP+and+DLP&amp;rft.btitle=International+Conference+on+Bioinformatics+and+Biomedical+Engineering+%28IWBBIO%29&amp;rft.genre=bookitem&amp;rft.pub=Springer&amp;rft_id=nfvr_pubs%2Fiwbbio15.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2015&amp;rft.au=Miguel+Tairum+Cruz&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"iwbbio15\" href=\"bibtexbrowser.php?key=iwbbio15&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/iwbbio15.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1007\/978-3-319-16480-9_20\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"50\"><\/a>[50]<\/td><td class=\"bibitem\">J. Guerreiro, A. Ilic, N. Roma, P. Tom\u00e1s, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/pdp15.pdf\"><span class=\"bibtitle\">Multi-kernel Auto-Tuning on GPUs: Performance and Energy-Aware Optimization<\/span><\/a>&quot;, in <em>Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP)<\/em>, M. Daneshtalab et al., Eds., IEEE Computer Society, mar, 2015, pp. 438\u2013445.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Multi-kernel+Auto-Tuning+on+GPUs%3A+Performance+and+Energy-Aware+Optimization&amp;rft.btitle=Euromicro+International+Conference+on+Parallel%2C+Distributed%2C+and+Network-Based+Processing+%28PDP%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE+Computer+Society&amp;rft_id=nfvr_pubs%2Fpdp15.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2015&amp;rft.au=Jo%C3%A3o+Guerreiro&amp;rft.au=Aleksandar+Ilic&amp;rft.au=Nuno+Roma&amp;rft.au=Pedro+Tom%C3%A1s\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"pdp15\" href=\"bibtexbrowser.php?key=pdp15&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/pdp15.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/PDP.2015.44\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2014<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"49\"><\/a>[49]<\/td><td class=\"bibitem\">S. Momcilovic, A. Ilic, N. Roma, L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/icip14.pdf\"><span class=\"bibtitle\">Collaborative inter-prediction on CPU+GPU systems<\/span><\/a>&quot;, in <em>IEEE International Conference on Image Processing (ICIP)<\/em>, IEEE, oct, 2014, pp. 1228\u20131232.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Collaborative+inter-prediction+on+CPU%2BGPU+systems&amp;rft.btitle=IEEE+International+Conference+on+Image+Processing+%28ICIP%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Ficip14.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2014&amp;rft.au=Svetislav+Momcilovic&amp;rft.au=Aleksandar+Ilic&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"icip14\" href=\"bibtexbrowser.php?key=icip14&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/icip14.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/ICIP.2014.7025245\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"48\"><\/a>[48]<\/td><td class=\"bibitem\">S. Momcilovic, A. Ilic, N. Roma, L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/nesus14.pdf\"><span class=\"bibtitle\">Efficient Parallel Video Encoding on Heterogeneous Systems<\/span><\/a>&quot;, in <em>Network for Sustainable Ultrascale Computing Workshop (NESUS)<\/em>, oct, 2014.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Efficient+Parallel+Video+Encoding+on+Heterogeneous+Systems&amp;rft.btitle=Network+for+Sustainable+Ultrascale+Computing+Workshop+%28NESUS%29&amp;rft.genre=bookitem&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Fnesus14.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2014&amp;rft.au=Svetislav+Momcilovic&amp;rft.au=Aleksandar+Ilic&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"nesus14\" href=\"bibtexbrowser.php?key=nesus14&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/nesus14.pdf\">[pdf]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"47\"><\/a>[47]<\/td><td class=\"bibitem\">A. Gorobets, F. Pratas, N. Roma, P. Tom\u00e1s, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/mpp14.pdf\"><span class=\"bibtitle\">Stream Oriented Modular Architecture with Polymorphic Processing Engines<\/span><\/a>&quot;, in <em>IEEE International Symposium on Computer Architecture and High Performance Computing Workshop (SBAC-PAD)<\/em>, IEEE Computer Society, oct, 2014, pp. 84\u201389.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Stream+Oriented+Modular+Architecture+with+Polymorphic+Processing+Engines&amp;rft.btitle=IEEE+International+Symposium+on+Computer+Architecture+and+High+Performance+Computing+Workshop+%28SBAC-PAD%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE+Computer+Society&amp;rft_id=nfvr_pubs%2Fmpp14.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2014&amp;rft.au=Andriy+Gorobets&amp;rft.au=Frederico+Pratas&amp;rft.au=Nuno+Roma&amp;rft.au=Pedro+Tom%C3%A1s\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"mpp14\" href=\"bibtexbrowser.php?key=mpp14&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/mpp14.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/SBAC-PADW.2014.26\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"46\"><\/a>[46]<\/td><td class=\"bibitem\">A. Ilic, S. Momcilovic, N. Roma, L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/icpp14.pdf\"><span class=\"bibtitle\">FEVES: Framework for Efficient Parallel Video Encoding on Heterogeneous Systems<\/span><\/a>&quot;, in <em>International Conference on Parallel Processing (ICPP)<\/em>, IEEE Computer Society, sep, 2014, pp. 20\u201329.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=FEVES%3A+Framework+for+Efficient+Parallel+Video+Encoding+on+Heterogeneous+Systems&amp;rft.btitle=International+Conference+on+Parallel+Processing+%28ICPP%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE+Computer+Society&amp;rft_id=nfvr_pubs%2Ficpp14.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2014&amp;rft.au=Aleksandar+Ilic&amp;rft.au=Svetislav+Momcilovic&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"icpp14\" href=\"bibtexbrowser.php?key=icpp14&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/icpp14.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/ICPP.2014.11\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"45\"><\/a>[45]<\/td><td class=\"bibitem\">D. F. d. Souza, N. Roma and L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/eusipco14.pdf\"><span class=\"bibtitle\">Opencl parallelization of the HEVC de-quantization and inverse transform for heterogeneous platforms<\/span><\/a>&quot;, in <em>European Signal Processing Conference (EUSIPCO)<\/em>, IEEE, sep, 2014, pp. 755\u2013759.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Opencl+parallelization+of+the+HEVC+de-quantization+and+inverse+transform+for+heterogeneous+platforms&amp;rft.btitle=European+Signal+Processing+Conference+%28EUSIPCO%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Feusipco14.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2014&amp;rft.au=Diego+F.+de+Souza&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"eusipco14\" href=\"bibtexbrowser.php?key=eusipco14&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/eusipco14.pdf\">[pdf]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"44\"><\/a>[44]<\/td><td class=\"bibitem\">D. Nogueira, P. Tom\u00e1s and N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/hpcs14a.pdf\"><span class=\"bibtitle\">Burrows-Wheeler Transform based indexed exact search on a multi-GPU OpenCL platform<\/span><\/a>&quot;, in <em>International Conference on High Performance Computing & Simulation (HPCS)<\/em>, IEEE, jul, 2014, pp. 31\u201338.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Burrows-Wheeler+Transform+based+indexed+exact+search+on+a+multi-GPU+OpenCL+platform&amp;rft.btitle=International+Conference+on+High+Performance+Computing+%26+Simulation+%28HPCS%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Fhpcs14a.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2014&amp;rft.au=David+Nogueira&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"hpcs14a\" href=\"bibtexbrowser.php?key=hpcs14a&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/hpcs14a.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/HPCSim.2014.6903666\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"43\"><\/a>[43]<\/td><td class=\"bibitem\">M. T. Cruz, P. Tom\u00e1s and N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/hpcs14b.pdf\"><span class=\"bibtitle\">Low-power vectorial VLIW architecture for maximum parallelism exploitation of dynamic programming algorithms<\/span><\/a>&quot;, in <em>International Conference on High Performance Computing & Simulation (HPCS)<\/em>, IEEE, jul, 2014, pp. 88\u201395.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Low-power+vectorial+VLIW+architecture+for+maximum+parallelism+exploitation+of+dynamic+programming+algorithms&amp;rft.btitle=International+Conference+on+High+Performance+Computing+%26+Simulation+%28HPCS%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Fhpcs14b.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2014&amp;rft.au=Miguel+Tairum+Cruz&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"hpcs14b\" href=\"bibtexbrowser.php?key=hpcs14b&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/hpcs14b.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/HPCSim.2014.6903673\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"42\"><\/a>[42]<\/td><td class=\"bibitem\">N. Sebasti\u00e3o, P. F. Flores and N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/hpcs14c.pdf\"><span class=\"bibtitle\">Optimized ASIP architecture for compressed BWT-indexed search in bioinformatics applications<\/span><\/a>&quot;, in <em>International Conference on High Performance Computing & Simulation (HPCS)<\/em>, IEEE, jul, 2014, pp. 527\u2013534.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Optimized+ASIP+architecture+for+compressed+BWT-indexed+search+in+bioinformatics+applications&amp;rft.btitle=International+Conference+on+High+Performance+Computing+%26+Simulation+%28HPCS%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Fhpcs14c.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2014&amp;rft.au=Nuno+Sebasti%C3%A3o&amp;rft.au=Paulo+F.+Flores&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"hpcs14c\" href=\"bibtexbrowser.php?key=hpcs14c&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/hpcs14c.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/HPCSim.2014.6903731\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"41\"><\/a>[41]<\/td><td class=\"bibitem\">D. F. d. Souza, N. Roma and L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/icassp14.pdf\"><span class=\"bibtitle\">Cooperative CPU+GPU deblocking filter parallelization for high performance HEVC video codecs<\/span><\/a>&quot;, in <em>IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP)<\/em>, IEEE, may, 2014, pp. 4993\u20134997.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Cooperative+CPU%2BGPU+deblocking+filter+parallelization+for+high+performance+HEVC+video+codecs&amp;rft.btitle=IEEE+International+Conference+on+Acoustics%2C+Speech+and+Signal+Processing+%28ICASSP%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Ficassp14.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2014&amp;rft.au=Diego+F.+de+Souza&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"icassp14\" href=\"bibtexbrowser.php?key=icassp14&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/icassp14.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/ICASSP.2014.6854552\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"40\"><\/a>[40]<\/td><td class=\"bibitem\">T. Ferreirinha, R. Nunes, A. Soares, F. Pratas, P. Tom\u00e1s, N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/heteropar14.pdf\"><span class=\"bibtitle\">GPU Accelerated Stochastic Inversion of Deep Water Seismic Data<\/span><\/a>&quot;, in <em>International Workshop on Algorithms, Models and Tools for Parallel Computing on Heterogeneous Platforms (HeteroPar)<\/em>, L. M. B. Lopes et al., Eds., Springer, 2014, pp. 239\u2013250.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=GPU+Accelerated+Stochastic+Inversion+of+Deep+Water+Seismic+Data&amp;rft.btitle=International+Workshop+on+Algorithms%2C+Models+and+Tools+for+Parallel+Computing+on+Heterogeneous+Platforms+%28HeteroPar%29&amp;rft.genre=bookitem&amp;rft.pub=Springer&amp;rft_id=nfvr_pubs%2Fheteropar14.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2014&amp;rft.au=Tom%C3%A1s+Ferreirinha&amp;rft.au=R%C3%BAben+Nunes&amp;rft.au=Am%C3%ADlcar+Soares&amp;rft.au=Frederico+Pratas&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"heteropar14\" href=\"bibtexbrowser.php?key=heteropar14&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/heteropar14.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1007\/978-3-319-14325-5_21\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2013<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"39\"><\/a>[39]<\/td><td class=\"bibitem\">S. Paiagua, F. Pratas, P. Tom\u00e1s, N. Roma, R. Chaves, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/sbac-pad13.pdf\"><span class=\"bibtitle\">HotStream: Efficient Data Streaming of Complex Patterns to Multiple Accelerating Kernels<\/span><\/a>&quot;, in <em>International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD)<\/em>, IEEE Computer Society, oct, 2013, pp. 17\u201324.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=HotStream%3A+Efficient+Data+Streaming+of+Complex+Patterns+to+Multiple+Accelerating+Kernels&amp;rft.btitle=International+Symposium+on+Computer+Architecture+and+High+Performance+Computing+%28SBAC-PAD%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE+Computer+Society&amp;rft_id=nfvr_pubs%2Fsbac-pad13.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2013&amp;rft.au=Sergio+Paiagua&amp;rft.au=Frederico+Pratas&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma&amp;rft.au=Ricardo+Chaves\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"sbac-pad13\" href=\"bibtexbrowser.php?key=sbac-pad13&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/sbac-pad13.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/SBAC-PAD.2013.17\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"38\"><\/a>[38]<\/td><td class=\"bibitem\">T. Dias, N. Roma and L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"dasip13.pdf\"><span class=\"bibtitle\">High performance multi-standard architecture for DCT computation in H.264\/AVC High Profile and HEVC codecs<\/span><\/a>&quot;, in <em>Conference on Design and Architectures for Signal and Image Processing (DASIP)<\/em>, IEEE, oct, 2013, pp. 14\u201321.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=High+performance+multi-standard+architecture+for+DCT+computation+in+H.264%2FAVC+High+Profile+and+HEVC+codecs&amp;rft.btitle=Conference+on+Design+and+Architectures+for+Signal+and+Image+Processing+%28DASIP%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=dasip13.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2013&amp;rft.au=Tiago+Dias&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"dasip13\" href=\"bibtexbrowser.php?key=dasip13&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"dasip13.pdf\">[pdf]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"37\"><\/a>[37]<\/td><td class=\"bibitem\">J. Cola\u00e7o, A. Matoga, A. Ilic, N. Roma, P. Tom\u00e1s, R. Chaves, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/ppam13.pdf\"><span class=\"bibtitle\">Transparent Application Acceleration by Intelligent Scheduling of Shared Library Calls on Heterogeneous Systems<\/span><\/a>&quot;, in <em>International Conference on Parallel Processing and Applied Mathematics (PPAM)<\/em>, R. Wyrzykowski et al., Eds., Springer, sep, 2013, pp. 693\u2013703.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Transparent+Application+Acceleration+by+Intelligent+Scheduling+of+Shared+Library+Calls+on+Heterogeneous+Systems&amp;rft.btitle=International+Conference+on+Parallel+Processing+and+Applied+Mathematics+%28PPAM%29&amp;rft.genre=bookitem&amp;rft.pub=Springer&amp;rft_id=nfvr_pubs%2Fppam13.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2013&amp;rft.au=Jo%C3%A3o+Cola%C3%A7o&amp;rft.au=Adrian+Matoga&amp;rft.au=Aleksandar+Ilic&amp;rft.au=Nuno+Roma&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Ricardo+Chaves\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"ppam13\" href=\"bibtexbrowser.php?key=ppam13&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/ppam13.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1007\/978-3-642-55224-3_65\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"36\"><\/a>[36]<\/td><td class=\"bibitem\">J. M. Leit\u00e3o, J. A. Germano, N. Roma, R. Chaves, P. Tom\u00e1s, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/fpl13.pdf\"><span class=\"bibtitle\">Scalable and high throughput biosensing platform<\/span><\/a>&quot;, in <em>International Conference on Field programmable Logic and Applications (FPL)<\/em>, IEEE, sep, 2013, pp. 1\u20136.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Scalable+and+high+throughput+biosensing+platform&amp;rft.btitle=International+Conference+on+Field+programmable+Logic+and+Applications+%28FPL%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Ffpl13.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2013&amp;rft.au=Jos%C3%A9+M.+Leit%C3%A3o&amp;rft.au=Jos%C3%A9+A.+Germano&amp;rft.au=Nuno+Roma&amp;rft.au=Ricardo+Chaves&amp;rft.au=Pedro+Tom%C3%A1s\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"fpl13\" href=\"bibtexbrowser.php?key=fpl13&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/fpl13.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/FPL.2013.6645529\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"35\"><\/a>[35]<\/td><td class=\"bibitem\">A. Matoga, R. Chaves, P. Tom\u00e1s, N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/hpcs13.pdf\"><span class=\"bibtitle\">A flexible shared library profiler for early estimation of performance gains in heterogeneous systems<\/span><\/a>&quot;, in <em>International Conference on High Performance Computing & Simulation (HPCS)<\/em>, IEEE, jul, 2013, pp. 461\u2013470.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=A+flexible+shared+library+profiler+for+early+estimation+of+performance+gains+in+heterogeneous+systems&amp;rft.btitle=International+Conference+on+High+Performance+Computing+%26+Simulation+%28HPCS%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Fhpcs13.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2013&amp;rft.au=Adrian+Matoga&amp;rft.au=Ricardo+Chaves&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"hpcs13\" href=\"bibtexbrowser.php?key=hpcs13&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/hpcs13.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/HPCSim.2013.6641454\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"34\"><\/a>[34]<\/td><td class=\"bibitem\">N. Neves, N. Sebasti\u00e3o, A. Patricio, D. M. d. Matos, P. Tom\u00e1s, P. Flores, N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/asap13.pdf\"><span class=\"bibtitle\">BioBlaze: Multi-core SIMD ASIP for DNA sequence alignment<\/span><\/a>&quot;, in <em>International Conference on Application-Specific Systems, Architectures and Processors (ASAP)<\/em>, IEEE Computer Society, jun, 2013, pp. 241\u2013244.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=BioBlaze%3A+Multi-core+SIMD+ASIP+for+DNA+sequence+alignment&amp;rft.btitle=International+Conference+on+Application-Specific+Systems%2C+Architectures+and+Processors+%28ASAP%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE+Computer+Society&amp;rft_id=nfvr_pubs%2Fasap13.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2013&amp;rft.au=Nuno+Neves&amp;rft.au=Nuno+Sebasti%C3%A3o&amp;rft.au=Andre+Patricio&amp;rft.au=David+Martins+de+Matos&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Paulo+Flores&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"asap13\" href=\"bibtexbrowser.php?key=asap13&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/asap13.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/ASAP.2013.6567581\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2012<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"33\"><\/a>[33]<\/td><td class=\"bibitem\">N. Roma, P. Magalh\u00e3es, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/rsp12.pdf\"><span class=\"bibtitle\">System-level prototyping framework for heterogeneous multi-core architecture applied to biological sequence analysis<\/span><\/a>&quot;, in <em>IEEE International Symposium on Rapid System Prototyping (RSP)<\/em>, IEEE, oct, 2012, pp. 156\u2013162.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=System-level+prototyping+framework+for+heterogeneous+multi-core+architecture+applied+to+biological+sequence+analysis&amp;rft.btitle=IEEE+International+Symposium+on+Rapid+System+Prototyping+%28RSP%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Frsp12.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2012&amp;rft.au=Nuno+Roma&amp;rft.au=Pedro+Magalh%C3%A3es\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"rsp12\" href=\"bibtexbrowser.php?key=rsp12&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/rsp12.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/RSP.2012.6380705\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"32\"><\/a>[32]<\/td><td class=\"bibitem\">T. Dias, L. Ros\u00e1rio, N. Roma, L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/dsd12.pdf\"><span class=\"bibtitle\">High Performance Unified Architecture for Forward and Inverse Quantization in H.264\/AVC<\/span><\/a>&quot;, in <em>Euromicro Conference on Digital System Design (DSD)<\/em>, IEEE Computer Society, sep, 2012, pp. 632\u2013639.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=High+Performance+Unified+Architecture+for+Forward+and+Inverse+Quantization+in+H.264%2FAVC&amp;rft.btitle=Euromicro+Conference+on+Digital+System+Design+%28DSD%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE+Computer+Society&amp;rft_id=nfvr_pubs%2Fdsd12.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2012&amp;rft.au=Tiago+Dias&amp;rft.au=Luis+Ros%C3%A1rio&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"dsd12\" href=\"bibtexbrowser.php?key=dsd12&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/dsd12.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/DSD.2012.73\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"31\"><\/a>[31]<\/td><td class=\"bibitem\">S. Momcilovic, N. Roma and L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/heteropar12.pdf\"><span class=\"bibtitle\">Multi-level Parallelization of Advanced Video Coding on Hybrid CPU+GPU Platforms<\/span><\/a>&quot;, in <em>International Workshop on Algorithms, Models and Tools for Parallel Computing on Heterogeneous Platforms (HeteroPar)<\/em>, I. Caragiannis et al., Eds., Springer, aug, 2012, pp. 165\u2013174.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Multi-level+Parallelization+of+Advanced+Video+Coding+on+Hybrid+CPU%2BGPU+Platforms&amp;rft.btitle=International+Workshop+on+Algorithms%2C+Models+and+Tools+for+Parallel+Computing+on+Heterogeneous+Platforms+%28HeteroPar%29&amp;rft.genre=bookitem&amp;rft.pub=Springer&amp;rft_id=nfvr_pubs%2Fheteropar12.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2012&amp;rft.au=Svetislav+Momcilovic&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"heteropar12\" href=\"bibtexbrowser.php?key=heteropar12&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/heteropar12.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1007\/978-3-642-36949-0_19\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"30\"><\/a>[30]<\/td><td class=\"bibitem\">A. Matoga, R. Chaves, P. Tom\u00e1s, N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/acaces12.pdf\"><span class=\"bibtitle\">An FPGA based Accelerator for Encrypted File Systems<\/span><\/a>&quot;, in <em>International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES)<\/em>, HiPEAC, jul, 2012.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=An+FPGA+based+Accelerator+for+Encrypted+File+Systems&amp;rft.btitle=International+Summer+School+on+Advanced+Computer+Architecture+and+Compilation+for+High-Performance+and+Embedded+Systems+%28ACACES%29&amp;rft.genre=bookitem&amp;rft.pub=HiPEAC&amp;rft_id=nfvr_pubs%2Facaces12.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2012&amp;rft.au=Adrian+Matoga&amp;rft.au=Ricardo+Chaves&amp;rft.au=Pedro+Tom%C3%A1s&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"acaces12\" href=\"bibtexbrowser.php?key=acaces12&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/acaces12.pdf\">[pdf]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2011<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"29\"><\/a>[29]<\/td><td class=\"bibitem\">T. Dias, S. L\u00f3pez, N. Roma, L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/samos11.pdf\"><span class=\"bibtitle\">High throughput and scalable architecture for unified transform coding in embedded H.264\/AVC video coding systems<\/span><\/a>&quot;, in <em>International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS)<\/em>, L. Carro, A. D. Pimentel, Eds., IEEE, jul, 2011, pp. 225\u2013232.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=High+throughput+and+scalable+architecture+for+unified+transform+coding+in+embedded+H.264%2FAVC+video+coding+systems&amp;rft.btitle=International+Conference+on+Embedded+Computer+Systems%3A+Architectures%2C+Modeling%2C+and+Simulation+%28SAMOS%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Fsamos11.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2011&amp;rft.au=Tiago+Dias&amp;rft.au=Sebasti%C3%A1n+L%C3%B3pez&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"samos11\" href=\"bibtexbrowser.php?key=samos11&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/samos11.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/SAMOS.2011.6045465\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"28\"><\/a>[28]<\/td><td class=\"bibitem\">G. Encarna\u00e7\u00e3o, N. Sebasti\u00e3o and N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/hpcs11.pdf\"><span class=\"bibtitle\">Advantages and GPU implementation of high-performance indexed DNA search based on suffix arrays<\/span><\/a>&quot;, in <em>International Conference on High Performance Computing & Simulation (HPCS)<\/em>, W. W. Smari, J. P. McIntire, Eds., IEEE, jul, 2011, pp. 49\u201355.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Advantages+and+GPU+implementation+of+high-performance+indexed+DNA+search+based+on+suffix+arrays&amp;rft.btitle=International+Conference+on+High+Performance+Computing+%26+Simulation+%28HPCS%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Fhpcs11.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2011&amp;rft.au=Gustavo+Encarna%C3%A7%C3%A3o&amp;rft.au=Nuno+Sebasti%C3%A3o&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"hpcs11\" href=\"bibtexbrowser.php?key=hpcs11&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/hpcs11.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/HPCSim.2011.5999806\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2010<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"27\"><\/a>[27]<\/td><td class=\"bibitem\">T. Dias, N. Roma and L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/dasip10.pdf\"><span class=\"bibtitle\">Hardware\/software co-design of H.264\/AVC encoders for multi-core embedded systems<\/span><\/a>&quot;, in <em>Conference on Design & Architectures for Signal & Image Processing (DASIP)<\/em>, IEEE, oct, 2010, pp. 242\u2013249.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Hardware%2Fsoftware+co-design+of+H.264%2FAVC+encoders+for+multi-core+embedded+systems&amp;rft.btitle=Conference+on+Design+%26+Architectures+for+Signal+%26+Image+Processing+%28DASIP%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Fdasip10.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2010&amp;rft.au=Tiago+Dias&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"dasip10\" href=\"bibtexbrowser.php?key=dasip10&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/dasip10.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/DASIP.2010.5706271\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"26\"><\/a>[26]<\/td><td class=\"bibitem\">T. Dias, N. Roma and L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/soc10.pdf\"><span class=\"bibtitle\">H.264\/AVC framework for multi-core embedded video encoders<\/span><\/a>&quot;, in <em>International Symposium on System on Chip (SoC)<\/em>, IEEE, sep, 2010, pp. 89\u201392.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=H.264%2FAVC+framework+for+multi-core+embedded+video+encoders&amp;rft.btitle=International+Symposium+on+System+on+Chip+%28SoC%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Fsoc10.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2010&amp;rft.au=Tiago+Dias&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"soc10\" href=\"bibtexbrowser.php?key=soc10&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/soc10.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/ISSOC.2010.5625538\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"25\"><\/a>[25]<\/td><td class=\"bibitem\">N. Sebasti\u00e3o, T. Dias, N. Roma, P. Flores, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/hpcs10.pdf\"><span class=\"bibtitle\">Integrated accelerator architecture for DNA sequences alignment with enhanced traceback phase<\/span><\/a>&quot;, in <em>International Conference on High Performance Computing & Simulation (HPCS)<\/em>, W. W. Smari, J. P. McIntire, Eds., IEEE, jun, 2010, pp. 16\u201323.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Integrated+accelerator+architecture+for+DNA+sequences+alignment+with+enhanced+traceback+phase&amp;rft.btitle=International+Conference+on+High+Performance+Computing+%26+Simulation+%28HPCS%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Fhpcs10.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2010&amp;rft.au=Nuno+Sebasti%C3%A3o&amp;rft.au=Tiago+Dias&amp;rft.au=Nuno+Roma&amp;rft.au=Paulo+Flores\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"hpcs10\" href=\"bibtexbrowser.php?key=hpcs10&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/hpcs10.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/HPCS.2010.5547154\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"24\"><\/a>[24]<\/td><td class=\"bibitem\">A. Rodrigues, N. Roma and L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/nossdav10.pdf\"><span class=\"bibtitle\">p264: open platform for designing parallel H.264\/AVC video encoders on multi-core systems<\/span><\/a>&quot;, in <em>International Workshop on Network and Operating System Support for Digital Audio and Video (NOSSDAV)<\/em>, D. C. A. Bulterman, M. Hefeeda, Eds., ACM, jun, 2010, pp. 81\u201386.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=p264%3A+open+platform+for+designing+parallel+H.264%2FAVC+video+encoders+on+multi-core+systems&amp;rft.btitle=International+Workshop+on+Network+and+Operating+System+Support+for+Digital+Audio+and+Video+%28NOSSDAV%29&amp;rft.genre=bookitem&amp;rft.pub=ACM&amp;rft_id=nfvr_pubs%2Fnossdav10.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2010&amp;rft.au=Ant%C3%B3nio+Rodrigues&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"nossdav10\" href=\"bibtexbrowser.php?key=nossdav10&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/nossdav10.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1145\/1806565.1806586\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"23\"><\/a>[23]<\/td><td class=\"bibitem\">T. Almeida, N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/cisis10.pdf\"><span class=\"bibtitle\">A Parallel Programming Framework for Multi-core DNA Sequence Alignment<\/span><\/a>&quot;, in <em>International Conference on Complex, Intelligent and Software Intensive Systems (CISIS)<\/em>, L. Barolli et al., Eds., IEEE Computer Society, 2010, pp. 907\u2013912.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=A+Parallel+Programming+Framework+for+Multi-core+DNA+Sequence+Alignment&amp;rft.btitle=International+Conference+on+Complex%2C+Intelligent+and+Software+Intensive+Systems+%28CISIS%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE+Computer+Society&amp;rft_id=nfvr_pubs%2Fcisis10.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2010&amp;rft.au=Tiago+Almeida&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"cisis10\" href=\"bibtexbrowser.php?key=cisis10&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/cisis10.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/CISIS.2010.100\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2009<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"22\"><\/a>[22]<\/td><td class=\"bibitem\">G. Passos, N. Roma, B. A. d. Costa, L. Sousa, J. M. Lemos, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/ispdc09.pdf\"><span class=\"bibtitle\">Distributed Software Platform for Automation and Control of General Anaesthesia<\/span><\/a>&quot;, in <em>International Symposium on Parallel and Distributed Computing (ISPDC)<\/em>, L. Sousa, Y. Robert, Eds., IEEE Computer Society, jun, 2009, pp. 135\u2013142.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Distributed+Software+Platform+for+Automation+and+Control+of+General+Anaesthesia&amp;rft.btitle=International+Symposium+on+Parallel+and+Distributed+Computing+%28ISPDC%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE+Computer+Society&amp;rft_id=nfvr_pubs%2Fispdc09.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2009&amp;rft.au=Gesner+Passos&amp;rft.au=Nuno+Roma&amp;rft.au=Bertinho+Andrade+da+Costa&amp;rft.au=Leonel+Sousa&amp;rft.au=Jo%C3%A3o+Miranda+Lemos\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"ispdc09\" href=\"bibtexbrowser.php?key=ispdc09&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/ispdc09.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/ISPDC.2009.34\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2008<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"21\"><\/a>[21]<\/td><td class=\"bibitem\">N. Sebasti\u00e3o, T. Dias, N. Roma, P. Flores, L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/dsd08.pdf\"><span class=\"bibtitle\">Application Specific Programmable IP Core for Motion Estimation: Technology Comparison Targeting Efficient Embedded Co-Processing Units<\/span><\/a>&quot;, in <em>Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD)<\/em>, L. Fanucci, Ed., IEEE Computer Society, sep, 2008, pp. 181\u2013188.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Application+Specific+Programmable+IP+Core+for+Motion+Estimation%3A+Technology+Comparison+Targeting+Efficient+Embedded+Co-Processing+Units&amp;rft.btitle=Euromicro+Conference+on+Digital+System+Design%3A+Architectures%2C+Methods+and+Tools+%28DSD%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE+Computer+Society&amp;rft_id=nfvr_pubs%2Fdsd08.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2008&amp;rft.au=Nuno+Sebasti%C3%A3o&amp;rft.au=Tiago+Dias&amp;rft.au=Nuno+Roma&amp;rft.au=Paulo+Flores&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"dsd08\" href=\"bibtexbrowser.php?key=dsd08&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/dsd08.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/DSD.2008.66\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"20\"><\/a>[20]<\/td><td class=\"bibitem\">N. Sebasti\u00e3o, T. Dias, N. Roma, P. Flores, L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/acaces08.pdf\"><span class=\"bibtitle\">Specialized Motion Estimation Processor for Heterogeneous Multicore Video Coding Systems<\/span><\/a>&quot;, in <em>International Summer School on Advanced Computer Architecture and Compilation for Embedded Systems (ACACES)<\/em>, HiPEAC, jul, 2008.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Specialized+Motion+Estimation+Processor+for+Heterogeneous+Multicore+Video+Coding+Systems&amp;rft.btitle=International+Summer+School+on+Advanced+Computer+Architecture+and+Compilation+for+Embedded+Systems+%28ACACES%29&amp;rft.genre=bookitem&amp;rft.pub=HiPEAC&amp;rft_id=nfvr_pubs%2Facaces08.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2008&amp;rft.au=Nuno+Sebasti%C3%A3o&amp;rft.au=Tiago+Dias&amp;rft.au=Nuno+Roma&amp;rft.au=Paulo+Flores&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"acaces08\" href=\"bibtexbrowser.php?key=acaces08&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/acaces08.pdf\">[pdf]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2007<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"19\"><\/a>[19]<\/td><td class=\"bibitem\">N. Roma, L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/pcs07.pdf\"><span class=\"bibtitle\">Fully compressed-domain transcoder for PIP\/PAP video composition<\/span><\/a>&quot;, in <em>Picture Coding Symposium (PCS)<\/em>, nov, 2007.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Fully+compressed-domain+transcoder+for+PIP%2FPAP+video+composition&amp;rft.btitle=Picture+Coding+Symposium+%28PCS%29&amp;rft.genre=bookitem&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Fpcs07.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2007&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"pcs07\" href=\"bibtexbrowser.php?key=pcs07&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/pcs07.pdf\">[pdf]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"18\"><\/a>[18]<\/td><td class=\"bibitem\">S. Momcilovic, N. Roma and L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/dsp07.pdf\"><span class=\"bibtitle\">Adaptive Motion Estimation Algorithm for H.264\/AVC<\/span><\/a>&quot;, in <em>International Conference on Digital Signal Processing (DSP)<\/em>, Cardiff - U.K.: IEEE, jul, 2007.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Adaptive+Motion+Estimation+Algorithm+for+H.264%2FAVC&amp;rft.btitle=International+Conference+on+Digital+Signal+Processing+%28DSP%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Fdsp07.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2007&amp;rft.au=Svetislav+Momcilovic&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"dsp07\" href=\"bibtexbrowser.php?key=dsp07&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/dsp07.pdf\">[pdf]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"17\"><\/a>[17]<\/td><td class=\"bibitem\">S. Momcilovic, N. Roma and L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/prime07.pdf\"><span class=\"bibtitle\">An ASIP Approach For Adaptive Motion Estimation on AVC<\/span><\/a>&quot;, in <em>Conference on PhD Research in Microelectronics and Electronics (PRIME)<\/em>, Bordeaux - France: IEEE, jul, 2007, pp. 165\u2013168.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=An+ASIP+Approach+For+Adaptive+Motion+Estimation+on+AVC&amp;rft.btitle=Conference+on+PhD+Research+in+Microelectronics+and+Electronics+%28PRIME%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Fprime07.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2007&amp;rft.au=Svetislav+Momcilovic&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"prime07\" href=\"bibtexbrowser.php?key=prime07&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/prime07.pdf\">[pdf]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2006<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"16\"><\/a>[16]<\/td><td class=\"bibitem\">T. Dias, N. Roma and L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/patmos06.pdf\"><span class=\"bibtitle\">Low Power Distance Measurement Unit for Real-Time Hardware Motion Estimators<\/span><\/a>&quot;, in <em>International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)<\/em>, J. Vounckx, N. Az\u00e9mard, P. Maurine, Eds., Springer, sep, 2006, pp. 247\u2013255.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Low+Power+Distance+Measurement+Unit+for+Real-Time+Hardware+Motion+Estimators&amp;rft.btitle=International+Workshop+on+Power+and+Timing+Modeling%2C+Optimization+and+Simulation+%28PATMOS%29&amp;rft.genre=bookitem&amp;rft.pub=Springer&amp;rft_id=nfvr_pubs%2Fpatmos06.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2006&amp;rft.au=Tiago+Dias&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"patmos06\" href=\"bibtexbrowser.php?key=patmos06&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/patmos06.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1007\/11847083_24\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"15\"><\/a>[15]<\/td><td class=\"bibitem\">S. Momcilovic, T. Dias, N. Roma, L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/dsd06.pdf\"><span class=\"bibtitle\">Application Specific Instruction Set Processor for Adaptive Video Motion Estimation<\/span><\/a>&quot;, in <em>Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD)<\/em>, IEEE Computer Society, sep, 2006, pp. 160\u2013167.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Application+Specific+Instruction+Set+Processor+for+Adaptive+Video+Motion+Estimation&amp;rft.btitle=Euromicro+Conference+on+Digital+System+Design%3A+Architectures%2C+Methods+and+Tools+%28DSD%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE+Computer+Society&amp;rft_id=nfvr_pubs%2Fdsd06.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2006&amp;rft.au=Svetislav+Momcilovic&amp;rft.au=Tiago+Dias&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"dsd06\" href=\"bibtexbrowser.php?key=dsd06&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/dsd06.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/DSD.2006.25\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2005<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"14\"><\/a>[14]<\/td><td class=\"bibitem\">T. Dias, N. Roma and L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/sips05.pdf\"><span class=\"bibtitle\">Efficient Motion Vector Refinement Architecture for Sub-Pixel Motion Estimation Systems<\/span><\/a>&quot;, in <em>IEEE Workshop on Signal Processing Systems (SiPS)<\/em>, Athens - Greece: IEEE, nov, 2005, pp. 313\u2013318.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Efficient+Motion+Vector+Refinement+Architecture+for+Sub-Pixel+Motion+Estimation+Systems&amp;rft.btitle=IEEE+Workshop+on+Signal+Processing+Systems+%28SiPS%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Fsips05.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2005&amp;rft.au=Tiago+Dias&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"sips05\" href=\"bibtexbrowser.php?key=sips05&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/sips05.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/SIPS.2005.1579885\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"13\"><\/a>[13]<\/td><td class=\"bibitem\">T. Dias, N. Roma and L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/socc05.pdf\"><span class=\"bibtitle\">Efficient VLSI Architecture for Real-Time Motion Estimation in Advanced Video Coding<\/span><\/a>&quot;, in <em>IEEE International SOC Conference (SOCC)<\/em>, IEEE, sep, 2005, pp. 91\u201392.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Efficient+VLSI+Architecture+for+Real-Time+Motion+Estimation+in+Advanced+Video+Coding&amp;rft.btitle=IEEE+International+SOC+Conference+%28SOCC%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Fsocc05.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2005&amp;rft.au=Tiago+Dias&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"socc05\" href=\"bibtexbrowser.php?key=socc05&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/socc05.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/SOCC.2005.1554465\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"12\"><\/a>[12]<\/td><td class=\"bibitem\">N. Roma, L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/avss05.pdf\"><span class=\"bibtitle\">Least squares motion estimation algorithm in the compressed DCT domain for H.26x\/MPEG-x video sequences<\/span><\/a>&quot;, in <em>IEEE International Conference on Advanced Video and Signal Based Surveillance (AVSS)<\/em>, IEEE Computer Society, sep, 2005, pp. 576\u2013581.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Least+squares+motion+estimation+algorithm+in+the+compressed+DCT+domain+for+H.26x%2FMPEG-x+video+sequences&amp;rft.btitle=IEEE+International+Conference+on+Advanced+Video+and+Signal+Based+Surveillance+%28AVSS%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE+Computer+Society&amp;rft_id=nfvr_pubs%2Favss05.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2005&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"avss05\" href=\"bibtexbrowser.php?key=avss05&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/avss05.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/AVSS.2005.1577332\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2003<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"11\"><\/a>[11]<\/td><td class=\"bibitem\">N. Roma, T. Dias and L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/dcis03.pdf\"><span class=\"bibtitle\">Fast Adder Architectures: Modeling and Experimental Evaluation<\/span><\/a>&quot;, in <em>XVIII Conference on Design of Circuits and Integrated Systems (DCIS)<\/em>, nov, 2003, pp. 367\u2013372.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Fast+Adder+Architectures%3A+Modeling+and+Experimental+Evaluation&amp;rft.btitle=XVIII+Conference+on+Design+of+Circuits+and+Integrated+Systems+%28DCIS%29&amp;rft.genre=bookitem&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Fdcis03.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2003&amp;rft.au=Nuno+Roma&amp;rft.au=Tiago+Dias&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"dcis03\" href=\"bibtexbrowser.php?key=dcis03&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/dcis03.pdf\">[pdf]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"10\"><\/a>[10]<\/td><td class=\"bibitem\">N. Roma, T. Dias and L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/fpl03.pdf\"><span class=\"bibtitle\">Customisable Core-Based Architectures for Real-Time Motion Estimation on FPGAs<\/span><\/a>&quot;, in <em>International Conference on Field Programmable Logic and Applications (FPL)<\/em>, sep, 2003, pp. 745-754.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Customisable+Core-Based+Architectures+for+Real-Time+Motion+Estimation+on+FPGAs&amp;rft.btitle=International+Conference+on+Field+Programmable+Logic+and+Applications+%28FPL%29&amp;rft.genre=bookitem&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Ffpl03.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2003&amp;rft.au=Nuno+Roma&amp;rft.au=Tiago+Dias&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"fpl03\" href=\"bibtexbrowser.php?key=fpl03&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/fpl03.pdf\">[pdf]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2002<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"9\"><\/a>[9]<\/td><td class=\"bibitem\">N. Roma, L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/dsp02.pdf\"><span class=\"bibtitle\">Insertion of Irregular-Shaped Logos in the Compressed DCT Domain<\/span><\/a>&quot;, in <em>IEEE International Conference on Digital Signal Processing (DSP)<\/em>, jul, 2002, pp. 125\u2013128.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Insertion+of+Irregular-Shaped+Logos+in+the+Compressed+DCT+Domain&amp;rft.btitle=IEEE+International+Conference+on+Digital+Signal+Processing+%28DSP%29&amp;rft.genre=bookitem&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Fdsp02.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2002&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"dsp02\" href=\"bibtexbrowser.php?key=dsp02&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/dsp02.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/ICDSP.2002.1027848\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2001<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"8\"><\/a>[8]<\/td><td class=\"bibitem\">N. Roma, L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/vlsi01.pdf\"><span class=\"bibtitle\">A New VLSI Architecture for Full Search Block Matching<\/span><\/a>&quot;, in <em>IFIP International Conference on Very Large Scale Integration (VLSI-SoC)<\/em>, dec, 2001, pp. 213\u2013218.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=A+New+VLSI+Architecture+for+Full+Search+Block+Matching&amp;rft.btitle=IFIP+International+Conference+on+Very+Large+Scale+Integration+%28VLSI-SoC%29&amp;rft.genre=bookitem&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Fvlsi01.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2001&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"vlsi01\" href=\"bibtexbrowser.php?key=vlsi01&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/vlsi01.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1007\/978-0-387-35597-9_22\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"7\"><\/a>[7]<\/td><td class=\"bibitem\">N. Roma, L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/sips01.pdf\"><span class=\"bibtitle\">Parameterizable Hardware Architectures for Automatic Synthesis of Motion Estimation Processors<\/span><\/a>&quot;, in <em>IEEE Workshop on Signal Processing Systems (SiPS)<\/em>, sep, 2001, pp. 428\u2013439.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Parameterizable+Hardware+Architectures+for+Automatic+Synthesis+of+Motion+Estimation+Processors&amp;rft.btitle=IEEE+Workshop+on+Signal+Processing+Systems+%28SiPS%29&amp;rft.genre=bookitem&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Fsips01.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2001&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"sips01\" href=\"bibtexbrowser.php?key=sips01&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/sips01.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/SIPS.2001.957370\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2000<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"6\"><\/a>[6]<\/td><td class=\"bibitem\">N. Roma, L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/camp00.pdf\"><span class=\"bibtitle\">In the Development and Evaluation of Specialized Processors for Computing High-Order 2-D Image Moments in Real-Time<\/span><\/a>&quot;, in <em>International Workshop on Computer Architectures for Machine Perception (CAMP)<\/em>, IEEE Computer Society, sep, 2000, pp. 170.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=In+the+Development+and+Evaluation+of+Specialized+Processors+for+Computing+High-Order+2-D+Image+Moments+in+Real-Time&amp;rft.btitle=International+Workshop+on+Computer+Architectures+for+Machine+Perception+%28CAMP%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE+Computer+Society&amp;rft_id=nfvr_pubs%2Fcamp00.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2000&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"camp00\" href=\"bibtexbrowser.php?key=camp00&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/camp00.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/CAMP.2000.875975\">[doi]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"5\"><\/a>[5]<\/td><td class=\"bibitem\">N. Roma, J. Santos-Victor and J. Tom\u00e9, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/eccv00.pdf\"><span class=\"bibtitle\">A Comparative Analysis of Cross-Correlation Matching Algorithms Using a Pyramidal Resolution Approach<\/span><\/a>&quot;, in <em>Workshop on Empirical Evaluation Methods in Computer Vision, in conjunction with the European Conference on Computer Vision (ECCV)<\/em>, jun, 2000.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=A+Comparative+Analysis+of+Cross-Correlation+Matching+Algorithms+Using+a+Pyramidal+Resolution+Approach&amp;rft.btitle=Workshop+on+Empirical+Evaluation+Methods+in+Computer+Vision%2C+in+conjunction+with+the+European+Conference+on+Computer+Vision+%28ECCV%29&amp;rft.genre=bookitem&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Feccv00.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2000&amp;rft.au=Nuno+Roma&amp;rft.au=Jos%C3%A9+Santos-Victor&amp;rft.au=Jos%C3%A9+Tom%C3%A9\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"eccv00\" href=\"bibtexbrowser.php?key=eccv00&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/eccv00.pdf\">[pdf]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">1999<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"4\"><\/a>[4]<\/td><td class=\"bibitem\">M. Ortigueira, N. Roma, C. Martins, M. Piedade, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/matlab99.pdf\"><span class=\"bibtitle\">An Archetypal Based ECG Analysis System<\/span><\/a>&quot;, in <em>III Congreso de Usuarios de MATLAB (MATLAB)<\/em>, nov, 1999.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=An+Archetypal+Based+ECG+Analysis+System&amp;rft.btitle=III+Congreso+de+Usuarios+de+MATLAB+%28MATLAB%29&amp;rft.genre=bookitem&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Fmatlab99.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=1999&amp;rft.au=Manual+Ortigueira&amp;rft.au=Nuno+Roma&amp;rft.au=Carlos+Martins&amp;rft.au=Mois%C3%A9s+Piedade\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"matlab99\" href=\"bibtexbrowser.php?key=matlab99&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/matlab99.pdf\">[pdf]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"3\"><\/a>[3]<\/td><td class=\"bibitem\">C. Coelho, N. Roma and L. Sousa, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/dcis99.pdf\"><span class=\"bibtitle\">Pipeline Architectures for Computing 2-D Image Moments<\/span><\/a>&quot;, in <em>XIV Conference on Design of Circuits and Integrated Systems (DCIS)<\/em>, nov, 1999, pp. 169\u2013174.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Pipeline+Architectures+for+Computing+2-D+Image+Moments&amp;rft.btitle=XIV+Conference+on+Design+of+Circuits+and+Integrated+Systems+%28DCIS%29&amp;rft.genre=bookitem&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Fdcis99.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=1999&amp;rft.au=Carlos+Coelho&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"dcis99\" href=\"bibtexbrowser.php?key=dcis99&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/dcis99.pdf\">[pdf]<\/a><\/span><\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"2\"><\/a>[2]<\/td><td class=\"bibitem\">L. Sousa, N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/mmsp99.pdf\"><span class=\"bibtitle\">Low-power array architectures for motion estimation<\/span><\/a>&quot;, in <em>IEEE Workshop on Multimedia Signal Processing (MMSP)<\/em>, K. J. R. Liu et al., Eds., IEEE, 1999, pp. 679\u2013684.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Low-power+array+architectures+for+motion+estimation&amp;rft.btitle=IEEE+Workshop+on+Multimedia+Signal+Processing+%28MMSP%29&amp;rft.genre=bookitem&amp;rft.pub=IEEE&amp;rft_id=nfvr_pubs%2Fmmsp99.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=1999&amp;rft.au=Leonel+Sousa&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"mmsp99\" href=\"bibtexbrowser.php?key=mmsp99&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/mmsp99.pdf\">[pdf]<\/a> <a href=\"https:\/\/doi.org\/10.1109\/MMSP.1999.793944\">[doi]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">1998<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"1\"><\/a>[1]<\/td><td class=\"bibitem\">A. Abreu, N. Roma, L. Sousa, J. Gerald, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/esiee99.pdf\"><span class=\"bibtitle\">Digital Video Transmission through the Electrical Power Lines<\/span><\/a>&quot;, in <em>Second European DSP Education and Research Conference<\/em>, sep, 1998.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.atitle=Digital+Video+Transmission+through+the+Electrical+Power+Lines&amp;rft.btitle=Second+European+DSP+Education+and+Research+Conference&amp;rft.genre=bookitem&amp;rft.pub=&amp;rft_id=nfvr_pubs%2Fesiee99.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=1998&amp;rft.au=Alexandre+Abreu&amp;rft.au=Nuno+Roma&amp;rft.au=Leonel+Sousa&amp;rft.au=Jos%C3%A9+Gerald\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"esiee99\" href=\"bibtexbrowser.php?key=esiee99&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/esiee99.pdf\">[pdf]<\/a><\/span><\/td><\/tr>\n<\/table>\n<div class=\"sheader\"><a id=\"Theses\"><\/a>Theses<\/div>\n<table class=\"result\">\n<tr><td colspan=\"2\" class=\"theader\">2008<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"3\"><\/a>[3]<\/td><td class=\"bibitem\">N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/phd_thesis.pdf\"><span class=\"bibtitle\">Transform Domain Transcoding Systems for Static and Dynamic Video Composition<\/span><\/a>&quot;, Ph.D. dissertation, Instituto Superior T\u00e9cnico, Universidade T\u00e9cnica de Lisboa, 2008.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.btitle=Transform+Domain+Transcoding+Systems+for+Static+and+Dynamic+Video+Composition&amp;rft.genre=report&amp;rft.pub=Instituto+Superior+T%C3%A9cnico%2C+Universidade+T%C3%A9cnica+de+Lisboa&amp;rft_id=nfvr_pubs%2Fphd_thesis.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2008&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"phd_thesis\" href=\"bibtexbrowser.php?key=phd_thesis&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/phd_thesis.pdf\">[pdf]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">2001<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"2\"><\/a>[2]<\/td><td class=\"bibitem\">N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/msc_thesis.pdf\"><span class=\"bibtitle\">Processadores Dedicados para Estima\u00e7\u00e3o de Movimento em Sequ\u00eancias de V\u00eddeo<\/span><\/a>&quot;, Master's thesis, Instituto Superior T\u00e9cnico, Universidade T\u00e9cnica de Lisboa, 2001.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.btitle=Processadores+Dedicados+para+Estima%C3%A7%C3%A3o+de+Movimento+em+Sequ%C3%AAncias+de+V%C3%ADdeo&amp;rft.genre=report&amp;rft.pub=Instituto+Superior+T%C3%A9cnico%2C+Universidade+T%C3%A9cnica+de+Lisboa&amp;rft_id=nfvr_pubs%2Fmsc_thesis.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=2001&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"msc_thesis\" href=\"bibtexbrowser.php?key=msc_thesis&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/msc_thesis.pdf\">[pdf]<\/a><\/span><\/td><\/tr>\n<tr><td colspan=\"2\" class=\"theader\">1998<\/td><\/tr>\n<tr class=\"bibline\"><td class=\"bibref\"><a class=\"bibanchor\" name=\"1\"><\/a>[1]<\/td><td class=\"bibitem\">A. Abreu, N. Roma, &quot;<a class=\"bibtitlelink\" target=\"_blank\"  href=\"nfvr_pubs\/grad_thesis.pdf\"><span class=\"bibtitle\">Sistema de Transmiss\u00e3o de V\u00eddeo atrav\u00e9s da Rede El\u00e9ctrica<\/span><\/a>&quot;, Master's thesis, Instituto Superior T\u00e9cnico, Universidade T\u00e9cnica de Lisboa, 1998.\n<span class=\"Z3988\" title=\"ctx_ver=Z39.88-2004&amp;rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&amp;rft.btitle=Sistema+de+Transmiss%C3%A3o+de+V%C3%ADdeo+atrav%C3%A9s+da+Rede+El%C3%A9ctrica&amp;rft.genre=report&amp;rft.pub=Instituto+Superior+T%C3%A9cnico%2C+Universidade+T%C3%A9cnica+de+Lisboa&amp;rft_id=nfvr_pubs%2Fgrad_thesis.pdf&amp;rfr_id=info%3Asid%2Fweb.tecnico.ulisboa.pt%3Anfvr.bib&amp;rft.date=1998&amp;rft.au=Alexandre+Abreu&amp;rft.au=Nuno+Roma\"><\/span> <span class=\"bibmenu\"><a class=\"biburl\" title=\"grad_thesis\" href=\"bibtexbrowser.php?key=grad_thesis&amp;bib=nfvr.bib\">[bibtex]<\/a> <a href=\"nfvr_pubs\/grad_thesis.pdf\">[pdf]<\/a><\/span><\/td><\/tr>\n<\/table><table class=\"result\">\n<\/table><script type=\"text\/javascript\" src=\"\/\/code.jquery.com\/jquery-3.6.4.min.js\"><\/script>\n<script type=\"text\/javascript\" ><!--\n\/\/ Javascript progressive enhancement for bibtexbrowser\n$('a.biburl').each(function() { \/\/ for each url \"[bibtex]\"\n  var biburl = $(this);\n  if (biburl.attr('bibtexbrowser') === undefined)\n  {\n  biburl.click(function(ev) { \/\/ we change the click semantics\n    ev.preventDefault(); \/\/ no open url\n    if (biburl.nextAll('pre').length == 0) { \/\/ we don't have yet the bibtex data\n      var bibtexEntryUrl = $(this).attr('href');\n      $.ajax({url: bibtexEntryUrl,  dataType: 'html', success: function (data) { \/\/ we download it\n        \/\/ elem is the element containing bibtex entry, creating a new element is required for Chrome and IE\n        var elem = $('<pre class=\"purebibtex\"\/>');\n        elem.text($('.purebibtex', data).text()); \/\/ both text() are required for IE\n        \/\/ we add a link so that users clearly see that even with AJAX\n        \/\/ there is still one URL per paper.\n        elem.append(\n          $('<div class=\"bibtex_entry_url\">%% Bibtex entry URL: <a href=\"'+bibtexEntryUrl+'\">'+bibtexEntryUrl+'<\/a><\/div>')\n          ).appendTo(biburl.parent());\n      }, error: function() {window.location.href = biburl.attr('href');}});\n    } else {biburl.nextAll('pre').toggle();}  \/\/ we toggle the view\n  });\n  biburl.attr('bibtexbrowser','done');\n  } \/\/ end if biburl.bibtexbrowser;\n});\n\n\n--><\/script>\n\n\n\n<p><\/p>\n","protected":false},"excerpt":{"rendered":"<p>The list below is a local compilation of my publication repository. Other external compilations can be found in: INESC-ID webpage (structured and most updated list) Google Scholar profile DBLP profile ORCID profile ResearcherID profile Types of publications: Editorials Book Chapters International Journal articles International Conference papers Theses<\/p>\n","protected":false},"author":2,"featured_media":0,"parent":0,"menu_order":1,"comment_status":"closed","ping_status":"closed","template":"","meta":{"footnotes":""},"folder":[],"class_list":["post-172","page","type-page","status-publish"],"_links":{"self":[{"href":"https:\/\/web.tecnico.ulisboa.pt\/~ist14359\/wordpress\/index.php?rest_route=\/wp\/v2\/pages\/172","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/web.tecnico.ulisboa.pt\/~ist14359\/wordpress\/index.php?rest_route=\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/web.tecnico.ulisboa.pt\/~ist14359\/wordpress\/index.php?rest_route=\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/web.tecnico.ulisboa.pt\/~ist14359\/wordpress\/index.php?rest_route=\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/web.tecnico.ulisboa.pt\/~ist14359\/wordpress\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=172"}],"version-history":[{"count":38,"href":"https:\/\/web.tecnico.ulisboa.pt\/~ist14359\/wordpress\/index.php?rest_route=\/wp\/v2\/pages\/172\/revisions"}],"predecessor-version":[{"id":1097,"href":"https:\/\/web.tecnico.ulisboa.pt\/~ist14359\/wordpress\/index.php?rest_route=\/wp\/v2\/pages\/172\/revisions\/1097"}],"wp:attachment":[{"href":"https:\/\/web.tecnico.ulisboa.pt\/~ist14359\/wordpress\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=172"}],"wp:term":[{"taxonomy":"folder","embeddable":true,"href":"https:\/\/web.tecnico.ulisboa.pt\/~ist14359\/wordpress\/index.php?rest_route=%2Fwp%2Fv2%2Ffolder&post=172"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}